Programmable interconnect structures and programmable integrated circuits

• US 5,701,027 A
• Filed: 05/21/1996
• Issued: 12/23/1997
• Est. Priority Date: 04/26/1991
• Status: Expired due to Term

• Current Assignee: QuickLogic Corporation
• Original Assignee: QuickLogic Corporation
• Inventors: Wong, Richard J., Gordon, Kathryn E.
• Primary Examiner(s): CARROLL, JAMES J
• Application Number:
  US08/651,102
• Time in Patent Office: 581 Days
• Field of Search: 257/530, 257/50, 437/922
• US Class Current: 257/530
• CPC Class Codes: H01L 23/5252 comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 148/055 Fuse

Abstract

Antifuses and gate arrays with antifuses are disclosed that have high thermal stability, reduced size, reduced leakage current, reduced capacitance in the unprogrammed state, improved manufacturing yield, and more controllable electrical characteristics. Some antifuses include spacers in the antifuse via. In some antifuses, the programmable material is planar, and the top or the bottom electrode is formed in the antifuse via. In some gate arrays, the antifuses are formed above the dielectric separating two levels of routing channels rather than below that dielectric.

Claims

1. An integrated structure comprising an antifuse comprising:

a first conductor;

an insulating layer overlaying said first conductor and having a first opening therethrough;

a conductive plug filling the first opening and contacting the first conductor, a top surface of the insulating layer having a portion adjacent to the plug, the portion being substantially coplanar with a top surface of the plug;

a layer of programmable material having a substantially planar bottom surface overlaying and contacting the plug, wherein the programmable material is non-conductive over the plug when the antifuse is unprogrammed, and wherein the programmable material provides therethrough a conductive path contacting the plug when the antifuse is programmed; and

a second conductor overlaying and contacting the programmable material.

2. The structure of claim 1 wherein the programmable material comprises amorphous silicon.

3. The structure of claim 1 wherein the plug comprises tungsten.

4. The structure of claim 1 wherein the insulating layer is at least about 9000 angstroms thick at a location of the first opening.

5. The structure of claim 1 further comprising:

a plurality of first conductive routing channels under the insulating layer, the first conductor being one of the first routing channels;

a plurality of logic cells connected to selected first routing channels;

a plurality of openings in the insulating layer, the first opening being one of the plurality of openings;

a plurality of conductive plugs in the openings, each conductive plug filling a respective one of the openings, wherein for each opening a top surface of the insulating layer has a portion adjacent to the respective plug and substantially coplanar with a top surface of the respective plug;

wherein the layer of programmable material has over each plug a substantially planar bottom surface contacting the plug; and

wherein the structure further comprises a plurality of second routing channels substantially orthogonal to the first routing channels, the second routing channels overlaying and contacting the programmable material over the plugs, the second conductor being one of the second routing channels.

6. The structure of claim 1 wherein the second conductor comprises:

titanium tungsten; and

aluminum separated from the programmable material by the titanium tungsten.

7. The integrated structure of claim 1 wherein the first conductor is made of metal.

8. The integrated structure of claim 1 wherein the substantially planar bottom surface of the programmable material overlays and contacts at least said portion of the top surface of the insulating layer.

9. The integrated structure of claim 1 wherein said portion of the top surface of the insulating layer surrounds the plug.