Analog data acquisition system
First Claim
1. An analog data acquisition system comprising:
- an analog input multiplexer having a plurality of input lines, an output line and a plurality of signal select lines;
an analog-to-digital (A/D) converter having an input line, a digital output bus, and a plurality of control lines;
whereinsaid input line of said A/D converter is connected to said analog input multiplexer output line; and
an acquisition sequencer coupled to said plurality of signal select lines and to said plurality of control lines;
wherein said acquisition sequencer comprises;
a state machine connected to said plurality of control lines of said A/D converter wherein said state machine generates said signals over said plurality of control lines so that each signal on said A/D converter input line is converted to a digital signal; and
further whereinsaid acquisition sequencer provides signals over said plurality of signal select lines so that a signal on one of said plurality of input lines to said analog input multiplexer is applied to said A/D converter; and
said acquisition sequencer provides signals over said plurality of control lines so that each signal on said A/D converter input line is converted to a digital signal.
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Accused Products
Abstract
An analog data acquisition system in an integrated circuit automatically processes and stores analog data without sequencing support from a processor. The analog data acquisition system converts each analog input signal into digital data. The digital data are stored in registers in the integrated circuit that are directly readable by a digital signal processor without data moves and are directly usable by the digital signal processor without further processing or conversion. Consequently, the analog data acquisition system minimizes the use of both the digital signal processor and the digital signal processor program memory and leaves capacity, i.e., both processing time and instruction memory locations, for use in other activities. The analog data acquisition system includes an analog input multiplexer and an analog-to-digital (A/D) converter that has an input line that is connected to the analog input multiplexer output line. An acquisition sequencer provides signals to the analog input multiplexer so that a signal on one of the plurality of input lines to the analog input multiplexer is applied to the A/D converter.
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Citations
39 Claims
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1. An analog data acquisition system comprising:
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an analog input multiplexer having a plurality of input lines, an output line and a plurality of signal select lines; an analog-to-digital (A/D) converter having an input line, a digital output bus, and a plurality of control lines;
whereinsaid input line of said A/D converter is connected to said analog input multiplexer output line; and an acquisition sequencer coupled to said plurality of signal select lines and to said plurality of control lines;
wherein said acquisition sequencer comprises;a state machine connected to said plurality of control lines of said A/D converter wherein said state machine generates said signals over said plurality of control lines so that each signal on said A/D converter input line is converted to a digital signal; and
further whereinsaid acquisition sequencer provides signals over said plurality of signal select lines so that a signal on one of said plurality of input lines to said analog input multiplexer is applied to said A/D converter; and said acquisition sequencer provides signals over said plurality of control lines so that each signal on said A/D converter input line is converted to a digital signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. In an integrated circuit having a plurality of pins, an analog data acquisition system comprising:
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a first plurality of inputs lines; an analog input multiplexer connected to said first plurality of input lines and having a plurality of channel select lines and an output line; an A/D reference select and buffers circuit having; a first plurality of input lines connected to a plurality of said pins; a second plurality of input lines connected to a reference voltage source within said integrated circuit; and a plurality of reference voltage output lines; an analog-to-digital (A/D) converter having; an input terminal connected to said output line of said analog input multiplexer; a plurality of reference voltage input terminals connected to said plurality of reference voltage output lines; a plurality of control input lines; and a digital output bus interface; an acquisition sequencer circuit connected to said plurality of channel select lines, to said plurality of control lines and having a plurality of output load lines; and a memory coupled to said digital output bus interface of said A/D converter and to said plurality of output load lines wherein in a first mode of operation said analog data acquisition system operates in a pipeline mode and in a second mode of operation said analog data acquisition system operates in a single channel mode.
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21. An analog data acquisition system comprising:
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an analog input multiplexer having a plurality of input lines, an output line and a plurality of signal select lines wherein a first set of said plurality of input lines of said analog input multiplexer are servo position burst input lines; an analog-to-digital (A/D) converter having an input line, a digital output bus, and a plurality of control lines;
whereinsaid input line of said A/D converter is connected to said analog input multiplexer output line; and an acquisition sequencer coupled to said plurality of signal select lines and to said plurality of control lines;
whereinsaid acquisition sequencer provides signals over said plurality of signal select lines so that a signal on one of said plurality of input lines to said analog input multiplexer is applied to said A/D converter; and said acquisition sequencer provides signals over said plurality of control lines so that each signal on said A/D converter input line is converted to a digital signal. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39)
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Specification