Multi-channel timing recovery system

• US 5,703,905 A
• Filed: 02/16/1996
• Issued: 12/30/1997
• Est. Priority Date: 02/16/1996
• Status: Expired due to Term

• Current Assignee: Conexant Incorporated (Synaptics Incorporated)
• Original Assignee: Globespan Technologies, Inc. (Synaptics Incorporated)
• Inventors: Langberg, Ehud
• Primary Examiner(s): VO, DON NGUYEN
• Application Number:
  US08/602,944
• Time in Patent Office: 683 Days
• Field of Search: 375/232, 375/260, 375/326, 375/327, 375/328, 375/350, 375/354, 375/355, 375/357, 331/1 R, 370/228
• US Class Current: 375/232
• CPC Class Codes: H04L 7/0062 detection of error based on data decision error, e.g. Mueller type detection
• CPC Class Codes: H04L 7/0083 taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
• CPC Class Codes: H04L 7/0278 Band edge detection

Abstract

An "N" channel receiver system includes "N" A/D converters, one per channel, sampling the data received by their respective channels. The sampling rate of the A/D converters is controlled by a sampling clock signal generated by a timing recovery circuit. One rate of the sampling clock is a function of a timing signal applied to the timing recovery circuit. The system may be configured so that each channel produces N distinct timing signals, corresponding to the data signals received by each one of the N channels. The N distinct timing signals are coupled to a mechanism configured to selectively couple one of the N distinct timing signals to the timing recovery circuit. In a preferred embodiment, the signal-to-noise ratio (SNR) of the N received signals is sensed and the timing signal of the channel having the highest SNR is coupled via the controllable.

Claims

1. An N-channel receiver system comprising:

N input means, one input means per channel, for receiving transmitted signals, where N is an integer greater than one;

a signal responsive means, coupled to each one of the N input means for producing N separate timing signals, one timing signal per receiver channel, indicative of the frequency and phase of the signal received at its input means;

an adjustable clocking circuit having an input and an output for producing sampling signals at its output which are responsive to timing signals applied to its input;

a controllable gating means having N inputs and an output;

means for coupling each one of said N separate timing signals to a different one of said N inputs of said controllable gating means; and

means coupling the output of said controllable gating means to the input of said adjustable clocking circuit for selectively applying a selected one of the timing signals to the input of the adjustable clocking circuit.

2. An N-channel receiver system as claimed in claim 1,

wherein said signal responsive means includes N signal frequency responsive means, one per receiver channel, and each having an input and an output;

wherein said controllable gating means includes;

(a) means coupled to each channel of the receiver for sensing the signal-to-noise ratio (SNR) of the data signals received by each channel and for producing a control signal indicative of which channel has the highest SNR; and

(b) coupling the output of said controllable gating means to the input of said adjustable clocking means for applying thereto the timing signals of a selected one of said N signal frequency responsive means.

3. An N-channel receiver as claimed in claim 2,

wherein each one of said N input means includes an analog-to-digital converter (A/D);

wherein each A/D has;

(a) an input for receiving signals;

(b) a sampling terminal for the application thereto of said sampling signals produced by said adjustable clocking circuit; and

(c) an output at which is produced signal samples of the signals received at the input of the A/D.

4. An N-channel receiver as claimed in claim 3,

wherein each one of said N signal frequency responsive means includes a timing recovery filter means per channel;

wherein a timing recovery filter means is coupled between the output of each A/D and a different one of the N inputs of the controllable gating means;

wherein said controllable gating means has a control terminal;

wherein the control signal is applied to the control terminal of the controllable gating means for controlling which input of the gating means is coupled to its output; and

wherein the output of the controllable gating means is coupled to the input of the adjustable clocking circuit for supplying it with selected timing signals.

5. An N-channel receiver as claimed in claim 4, wherein said means coupled to each channel of the receiver for sensing the SNR includes:

(a) an adaptive equalizer per channel coupled to the output of the A/D of the receiver channel for producing, for each channel, a first signal indicative of the SNK of its corresponding receiver; and

(b) a comparator for receiving the first signal produced by all the adaptive equalizers for producing said control signal indicative of which receiver channel has the highest SNR.

6. An N-channel receiver as claimed in claim 5,

wherein said means coupled to each channel of the receiver for sensing the SNR includes:

(a) an adaptive equalizer per channel, each adaptive equalizer having an input, coupled to the output of a corresponding A/D, a first output at which is produced a signal indicative of the SNR of the received signal, and a second output at which is produced a signal corresponding to the transmitted data signal; and

(b) comparator means coupled to the first output of each adaptive equalizer for producing said control signal.

7. An N-channel receiver as claimed in claim 5,

wherein the timing signals of a first channel are coupled to an input of the gating means;

and

wherein the timing signals of a second channel are coupled via a phase offset adjustment circuit to another input of the gating means for reducing the difference in phase between the timing signals of the first and second channels when the timing signals of the second channel are substituted for the timing signals of the first channel.

8. An N-channel receiver as claimed in claim 5,

wherein said adjustable clocking circuit includes a phase locked loop (PLL), a frequency synthesizer and a master oscillator;

and

wherein the sampling signals are produced at the output of the frequency synthesizer.

9. An N-channel receiver as claimed in claim 2, wherein said means coupled to each channel of the receiver for sensing the SNR ration includes:

(a) an adaptive equalizer per channel of the receiver for producing, for each channel, a first signal indicative of the SNR of its corresponding receiver; and

(b) a comparator for receiving the first signal produced by all the adaptive equalizers for producing said control signal indicative of which receiver channel has the highest SNR.

10. An N-channel receiver as claimed in claim 1,

wherein said means for coupling each one of said N separate timing signals to a different one of said N inputs of said controllable gating means includes phase offset adjustment means for compensating for phase difference in timing signals when the timing signals of a channel are selected to be coupled to the input of the adjustable clocking circuit instead of the timing signals of another channel.

11. An N-channel receiver system as claimed in claim 1, wherein each receiver channel is adapted to receive a different portion of a signal to be reconstructed.

12. An N-channel receiver as claimed in claim 2,

wherein said signal frequency responsive means includes a timing recovery filter means per channel;

wherein said controllable gating means has one input per channel, a control terminal and an output;

wherein each timing recovery filter means is coupled between a receiver channel and a different input of the gating means;

wherein the control signal is applied to the control terminal of the controllable gating means for controlling which input of the gating means is coupled to its output; and

wherein the output of the gating means is coupled to the input of the adjustable clocking circuit for supplying it with selected timing signals.

13. A multi-channel receiver system comprising:

an adjustable clocking circuit having an input and an output for producing sampling signals at its output which are responsive to timing signals applied to its input;

means coupled to each channel of the receiver for sensing the signal-to-noise ration (SNR) of data signals received by each channel and for producing a control signal indicative of which channel has the highest SNR;

signal frequency responsive means coupled to each channel of the receiver for producing a timing signal for each receiver channel corresponding to the frequency and phase of the signals received by each channel; and

gating means coupled to said frequency responsive means and responsive to the control signal for selectively supplying to the input of the adjustable clocking circuit the timing signals from the receiver channel having the highest SNR.

14. A multi-channel receiver system as claimed in claim 13, wherein each channel is adapted to receive a different portion of a signal to be reconstructed.

15. A multi-channel receiver as claimed in claim 13,

wherein said signal frequency responsive means includes a timing recovery filter means per receiver channel;

wherein said gating means has one input per receiver channel, a control input terminal and an output;

wherein each timing recovery filter means is coupled between a receiver channel and a different input of the gating means;

wherein the control signal is applied to the control input terminal of the gating means for controlling which input of the gating means is coupled to its output; and

wherein the output of the gating means is coupled to the adjustable clocking circuit for supplying it with selected timing signals.

16. A multi-channel receiver as claimed in claim 15, wherein said means coupled to each channel of the receiver for sensing the SNR includes:

(a) an adaptive equalizer per channel coupled to the output of the A/D of the receiver channel for producing, for each channel, a first signal indicative of the SNR of its corresponding receiver; and

(b) a comparator for receiving the first signal produced by all the adaptive equalizers for producing said control signal indicative of which receiver channel has the highest SNR.

17. A multi-channel receiver as claimed in claim 16,

wherein the timing signals of a first channel are coupled to an input of the gating means;

and

wherein the timing signal of a second channel are coupled via a phase offset adjustment circuit to another input of the gating means for reducing any difference in phase between the timing signals of the first channel and those of the second channel when the timing signals of the second channel, instead of those of the first channel, are coupled via the gating means to the input of the adjustable clocking circuit.

18. A multi-channel receiver as claimed in claim 13,

wherein each channel of the receiver includes an analog-to-digital converter (A/D);

with each A/D having an input for receiving signals, a sampling terminal for the application thereto of said sampling signals produced by said adjustable clocking circuit, and an output at which is produced signal samples of the signals received at the A/D input.

19. A multi-channel receiver as claimed in claim 18,

wherein said signal frequency responsive means includes a timing recovery filter means per channel;

wherein said gating means has one input per channel, a control input terminal and an output;

wherein a timing recovery filter means is coupled between the output of an A/D of a receiver channel and a different input of the gating means;

wherein the control signal is applied to the control input terminal of the gating means for controlling which input of the gating means is coupled to its output; and

wherein the output of the gating means is coupled to the adjustable clocking circuit for supplying it with selected timing signals.

20. A multi-channel receiver as claimed in claim 19, wherein said means coupled to each channel of the receiver for sensing the SNR includes:

(a) an adaptive equalizer per channel coupled to the output of the A/D of the receiver channel for producing, for each channel, a first signal indicative of the SNR of its corresponding receiver; and

(b) a comparator for receiving the first signal produced by all the adaptive equalizers for producing said control signal indicative of which receiver channel has the highest SNR.

21. A multi-channel receiver as claimed in claim 20,

wherein said means coupled to each channel of the receiver for sensing the SNR includes:

(a) an adaptive equalizer per channel, each adaptive equalizer having an input, coupled to the output of a corresponding A/D, a first output at which is produced a signal indicative of the SNR of the received signal, and a second output at which is produced a signal corresponding to the transmitted data signal; and

(b) comparator means coupled to the first output of each adaptive equalizer for producing said control signal.

22. A multi-channel receiver as claimed in claim 20,

wherein the timing signals of a first channel are coupled to an input of the gating means;

and

wherein the timing signal of a second channel are coupled via a phase offset adjustment circuit to another input of the gating means for compensating for any difference in phase between the timing signals of the first and second channels when the second channel is coupled to the output of the gating means after the first channel is decoupled therefrom.

23. A multi-channel receiver system comprising:

an adjustable clocking circuit for producing sampling signals in response to timing signals;

means coupled to each channel of the multi-channels of the receiver for sensing the signal-to-noise ration (SNR) of the data signals received by each channel and for producing a control signal indicative of which channel has the highest SNR; and

means coupled to each channel of the multi-channels of the receiver for producing timing signals responsive to the frequency of the signals received by each channel and including means responsive to the control signal for supplying timing signals derived from the channel having the highest SNR to the adjustable clocking circuit for producing sampling signals which are a function of the signals received by the channel of the multi-channel receiver having the highest SNR.

24. A combination comprising:

first and second input terminals for respectively receiving first and second portions of a data signal;

first and second analog-to-digital converters (A/Ds);

each A/D having an input and an output;

said first A/D being coupled at its input to said first input terminal and said second A/D being coupled at its input to said second input terminal;

each A/D having a sampling terminal for the application thereto of a sampling signal for controlling the rate at which it Samples the data received at its input;

a first means coupled to the outputs of the first and second A/D for producing at a first output terminal information relative to the frequency of the data received at said first input terminal and for producing at a second output terminal information relative to the frequency of the data received at said second input terminal;

a second means coupled to the outputs of the first and second A/Ds for sensing the signal to noise ratio (SNR) of the data received on each channel and for producing a control signal indicating which channel has the higher SNR; and

selector means responsive to the control signal for coupling that one of the first and second output terminal whose data has the higher SNR to an adjustable timing recovery circuit signal for generating the sampling signals for the A/Ds.

25. A multi-channel receiver with each channel having an input terminal for receiving different portions of a data signal, comprising:

an analog-to-digital converter (A/D) per channel;

each A/D having an input and an output;

each A/D being coupled at its input to a corresponding input terminal;

each A/D having a sampling terminal for the application thereto of sampling signals for controlling the rate at which the A/D samples the data signals received at its input;

controllable sampling means, coupled to each A/D, responsive to a timing signal for producing sampling signals which are a function of the frequency of the data signals received by the receiver and for supplying the same sampling signals to all the A/D'"'"'s;

means coupled to the output of each A/D for sensing which A/D has the highest signal-to-Noise ratio (SNR) and for producing a control signal indicative thereof;

means coupled to the output of each A/D for sensing the frequency of the data signals received by each receiver channel and producing a corresponding timing signal; and

means responsive to the control signal for supplying the timing signal of the receiver channel having the highest SNR to the controllable sampling means.