Method of making the film transistor with all-around gate electrode
First Claim
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1. A method of forming a semiconductor device comprising:
- forming a strip of semiconductor material on an insulating support;
forming a layer of material on said strip of semiconductor material and on said insulating support;
forming in said layer and in said insulating support an opening around a midsection of said strip;
forming an insulator around said midsection; and
filling said opening with a conductive material to form an electrode around said insulator.
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Abstract
A semiconductor device includes an insulating support. A strip of semiconductor material has two ends in contact with the insulating support and a midsection extending between the ends. A dielectric layer encircles the midsection, and a conductive layer encircles the dielectric layer. The conductive layer has a substantially constant width such that a gate electrode formed within the conductive layer is fully self-aligned with drain and source regions formed within the ends.
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Citations
14 Claims
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1. A method of forming a semiconductor device comprising:
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forming a strip of semiconductor material on an insulating support; forming a layer of material on said strip of semiconductor material and on said insulating support; forming in said layer and in said insulating support an opening around a midsection of said strip; forming an insulator around said midsection; and filling said opening with a conductive material to form an electrode around said insulator. - View Dependent Claims (3, 4, 11)
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2. A method for forming a semiconductor device, comprising:
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forming a strip of semiconductor material on an insulating support; forming a cavity in said insulating support beneath a midsection of said strip by anisotropically etching openings along opposing sides of said midsection and isotropically etching said openings such that said openings merge to form said cavity; forming an insulator around said midsection; and forming a self-aligned electrode around said insulator.
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5. A method for forming a transistor, comprising:
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forming a strip of semiconductor material on an insulating support; forming a cavity in said insulating support beneath a midsection of said strip such that ends of said strip of semiconductor material adjacent said midsection are in contact with said insulating support; forming a channel of the transistor within said midsection; forming a gate insulator around said channel; forming a gate electrode around said gate insulator, said gate electrode having a first portion outside of said cavity and a second portion inside said cavity; and forming drain and source regions of the transistor within the respective ones of said ends such that said drain and source regions are self aligned to both of said first and second portions of said gate electrode. - View Dependent Claims (6, 9, 10)
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7. A method for forming a transistor, comprising:
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forming a layer of amorphous silicon on an insulating support; etching said layer to form a strip having first and second ends; forming a first dielectric layer over said insulating support and said strip; forming a second dielectric layer over said first dielectric layer; flowing said first and second dielectric layers to form a planar surface and to convert said amorphous silicon into polysilicon; forming a cavity in said insulating support beneath a midsection of said strip such that said ends of said strip contact said insulating support; forming a channel of the transistor within said midsection; forming a gate insulator around said channel; forming a gate electrode around said gate insulator, said gate electrode having a first portion outside of said cavity and a second portion inside of said cavity; and forming drain and source regions of the transistor within respective ones of said ends such that said drain and source regions are self-aligned to both of said first and second portions of said gate electrode.
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8. A method for forming a transistor, comprising:
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forming a strip of semiconductor material on an insulating support, said strip having first and second end regions; forming on said strip and said insulating support a layer having a substantially planar surface; forming on said layer a mask that exposes a midsection of said strip; anisotropically etching said layer and said insulating support to form openings that are adjacent to sides of said midsection; isotropically etching said insulating support such that said openings merge beneath said midsection to form a cavity and such that said end regions of said strip contact said insulating support; forming a channel of the transistor within said midsection; forming a gate insulator around said channel; forming a gate electrode around said gate insulator, said gate electrode having a first portion outside of said cavity and a second portion inside of said cavity; and forming drain and source regions of the transistor within respective ones of said end regions such that said drain and source regions are self-aligned to both of said first and second portions of said gate electrode.
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12. A method of forming a semiconductor device comprising:
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forming a strip of semiconductor material on a dielectric support; forming a cavity in said dielectric support beneath a midsection of said strip; forming an insulator around said midsection; and forming an electrode around said insulator such that a first portion of said electrode that is disposed above said midsection is self aligned to a second portion of said electrode that is disposed within said cavity and below said midsection. - View Dependent Claims (13, 14)
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Specification