Frequency locked-loop using a microcontroller as a comparator
First Claim
1. A frequency-locked loop comprising:
- a controllable oscillator for generating an output signal having a frequency the controllable oscillator having an input receiving a modulation signal in a transmission mode;
a sampler, coupled to the controllable oscillator, for sampling the frequency of the output signal;
a divider, coupled to the sampler, for dividing the frequency of the output signal to generate a prescaled signal;
a microprocessor, coupled to the divider and the controllable oscillator, for performing a comparison of the prescaled signal to a reference signal and generating a non-continuous signal for correcting the frequency of the controllable oscillator output signal when not in the transmission mode, the microprocessor having instructions stored therein which control sampling by the sampler;
a converter coupled to the microprocessor for converting the non-continuous control signal to an analog signal;
a low pass filter coupled to the converter for filtering undesired components from the analog signal; and
a summer coupled between the low pass filter and the controllable oscillator in order to provide for injection of the modulation signal.
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Accused Products
Abstract
A frequency-locked loop (100) employs a controllable oscillator (102) for generating an output signal having a frequency, optional sampler (104), coupled to oscillator (102), for sampling the frequency of the output signal, a divider (106), coupled to optional sampling circuit (104), for dividing the output signal frequency to generate a prescaled signal and a microprocessor (108), coupled between the divider 106 and oscillator (102), for comparing the prescaled signal to a reference signal and generating a control signal for correcting frequency shifts based upon the comparison. The control signal generated by microprocessor (108) is non-continuous. During that time when microprocessor (108) generates no control signals, power is removed from various frequency-locked loop circuitry.
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Citations
5 Claims
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1. A frequency-locked loop comprising:
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a controllable oscillator for generating an output signal having a frequency the controllable oscillator having an input receiving a modulation signal in a transmission mode; a sampler, coupled to the controllable oscillator, for sampling the frequency of the output signal; a divider, coupled to the sampler, for dividing the frequency of the output signal to generate a prescaled signal; a microprocessor, coupled to the divider and the controllable oscillator, for performing a comparison of the prescaled signal to a reference signal and generating a non-continuous signal for correcting the frequency of the controllable oscillator output signal when not in the transmission mode, the microprocessor having instructions stored therein which control sampling by the sampler; a converter coupled to the microprocessor for converting the non-continuous control signal to an analog signal; a low pass filter coupled to the converter for filtering undesired components from the analog signal; and a summer coupled between the low pass filter and the controllable oscillator in order to provide for injection of the modulation signal. - View Dependent Claims (2, 3, 4)
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5. A method for conserving power resources in a transmission circuit, comprising the steps of:
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generating an output signal having a variable frequency; performing, when in a non-transmission mode of operation, a comparison in a microprocessor of a prescaled signal, derived from the output signal, to a reference signal having a frequency, where the reference signal is a clock signal for the microprocessor; generating a non-continuous control signal for frequency adjusting the output signal based upon the comparison; operating in a transmission mode; and removing power resources from at least a portion of the transmission circuit when no control signal is being generated while continuing to provide the reference signal.
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Specification