Apparatus and method for integrating texture memory and interpolation logic in a computer system

• US 5,706,481 A
• Filed: 05/22/1996
• Issued: 01/06/1998
• Est. Priority Date: 03/07/1994
• Status: Expired due to Term

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Silicon Graphics Incorporated (Graphics Properties Holdings, Inc.)
• Inventors: Hannah, Marc R., Nagy, Michael B.
• Primary Examiner(s): Powell, Mark R.
• Assistant Examiner(s): CHAUHAN, ULKA J
• Application Number:
  US08/650,117
• Time in Patent Office: 594 Days
• Field of Search: 395/118, 395/129, 395/130, 395/501-526, 345/149, 345/152, 345/153, 345/185, 345/186
• US Class Current: 345/519
• CPC Class Codes: G06T 11/001 Texturing; Colouring; Generation of texture or colour inpainting G06T5/77
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 15/04 Texture mapping

Abstract

In a computer graphics system, a semiconductor chip used in performing texture mapping. Textures are input to the semiconductor chip. These textures are stored in a main memory. Cache memory is used to accelerate the reading and writing of texels. A memory controller controls the data transfers between the main memory and the cache memory. Also included within the same semiconductor chip is an interpolator. The interpolator produces an output texel by interpolating from textures stored in memory. The interpolated texel value is output by the semiconductor chip, thereby minimizing transmission bandwidth as well as redundant storage of texture maps in a multi-processor environment.

Claims