Boost circuit
First Claim
1. A boost circuit for outputting to an output terminal an output voltage of a level higher than a supply voltage, comprising:
- buffer means for outputting an input signal;
a transistor responsive to the input signal of said buffer means rising from a low level to a high level and charging a potential of said output terminal;
a capacitor charged in response to an output signal of said buffer means rising from a low level to a high level and superimposing the charged potential on a potential of said output terminal; and
input prevention means for preventing an input of a high level signal to said buffer means until the potential of said output terminal attains a low level, when a pulse signal falling to a low level is merged with said input signal after said input signal rises from a low level to a high level.
1 Assignment
0 Petitions
Accused Products
Abstract
When input signal IN rises to an "H" level, node N1 attain an "H" level, and output terminal OUT is charged to a level of VCC-VTH by n channel transistor. Capacitor is charged by the "H" level signal transmitted through inverters, and the charged potential is superimposed on output terminal OUT. When a short pulse is merged with input signal IN, RS flipflop is latched, and node N1 attains an "L" level, thereby discharging the voltage of the output terminal. When the output terminal attains an "L" level, NAND gate is opened and RS flipflop is reset, thereby raising the output terminal again to a boost voltage.
10 Citations
3 Claims
-
1. A boost circuit for outputting to an output terminal an output voltage of a level higher than a supply voltage, comprising:
-
buffer means for outputting an input signal; a transistor responsive to the input signal of said buffer means rising from a low level to a high level and charging a potential of said output terminal; a capacitor charged in response to an output signal of said buffer means rising from a low level to a high level and superimposing the charged potential on a potential of said output terminal; and input prevention means for preventing an input of a high level signal to said buffer means until the potential of said output terminal attains a low level, when a pulse signal falling to a low level is merged with said input signal after said input signal rises from a low level to a high level. - View Dependent Claims (2, 3)
-
Specification