Low power dual sampler utilizing step recovery diodes (SRDS)
First Claim
1. A dual sampler circuit comprising:
- a power amplifier having an input for receiving an LO signal and an output coupled to a first node; and
first and second sampler switches, each of the first and second sampler switches comprising;
a step recovery diode (SRD) coupled to the first node for receiving the LO signal and for providing an impulsive signal after a number of cycles of the LO signal; and
a first switching diode having a first end coupled to a first terminal of the step recovery diode to provide an IF output signal, and a second end connected for receiving a RF input signal, the first switching diode being forward biased when receiving the impulse from the step recovery diode.
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Accused Products
Abstract
A low power dual sampler including two sampler switches with a step recovery diode (SRD) in each sampler switch. A local oscillator (LO) signal is provided through a power amplifier and transformer to baluns in the sampler switches without utilizing a power splitter, providing limited power loss to each balun. Each balun is configured to provide the LO signal to terminals of the SRD in a sampler switch without providing a termination to SRD impulses. Each sampler switch further includes series diodes connected across the terminals of each SRD switch with a junction of the series diodes connected to receive an RF signal, and the terminals of each SRD connected for providing an IF signal. To limit phase shift between SRD impulses, a temperature compensation circuit provides a DC offset voltage to each SRD. In one embodiment, each temperature compensation circuit includes an operational amplifier having a noninverting terminal coupled to a terminal of an SRD, an inverting terminal connected by a first resistor to ground, and an output connected by a second resistor to the inverting terminal and by a third resistor to the non-inverting terminal. To provide isolation between the sampler switches, a capacitor providing a high impedance to the LO signal and a low impedance to RF signals is connected at the interconnection of the sampler switches.
24 Citations
11 Claims
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1. A dual sampler circuit comprising:
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a power amplifier having an input for receiving an LO signal and an output coupled to a first node; and first and second sampler switches, each of the first and second sampler switches comprising; a step recovery diode (SRD) coupled to the first node for receiving the LO signal and for providing an impulsive signal after a number of cycles of the LO signal; and a first switching diode having a first end coupled to a first terminal of the step recovery diode to provide an IF output signal, and a second end connected for receiving a RF input signal, the first switching diode being forward biased when receiving the impulse from the step recovery diode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A dual sampler circuit comprising:
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a power amplifier having an input for receiving an LO signal and an output; a transformer for coupling the output of the power amplifier to a first node; a pair of sampler switches, each sampler switch comprising;
an SRD;a first switching diode having a first end for providing an IF signal coupled to a first terminal of the SRD, a second switching diode having a first end coupled to a second terminal of the SRD and a second terminal connected to the second terminal of the first switching diode for receiving an RF signal; and a balun having a first path coupling the first node to the first end of the first diode, and a second path coupling the first end of the second diode to ground; and an isolation capacitor providing a high impedance to the LO signal and a low impedance to the RF signal received by either sampler switch in of the pair of sampler switches, the isolation capacitor coupling the first node to ground. - View Dependent Claims (10, 11)
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Specification