Method and apparatus for reducing the rate of interrupts by generating a single interrupt for a group of events

• US 5,708,814 A
• Filed: 11/21/1995
• Issued: 01/13/1998
• Est. Priority Date: 11/21/1995
• Status: Expired due to Term

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Short, Robert T., Parchem, John M., Cutler, David N.
• Primary Examiner(s): Harvey, Jack B.
• Assistant Examiner(s): Lefkowitz, Sumati
• Application Number:
  US08/561,104
• Time in Patent Office: 784 Days
• Field of Search: 395/733-742
• US Class Current: 710/260
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence

Abstract

A peripheral device interrupt controller maintains a count of pending interrupt events for a peripheral device up to a preset limit and times a preset delay interval from a first pending interrupt event or last interrupt servicing before asserting an interrupt request. When the interrupt request is asserted, the then pending interrupt events can be serviced as a group by a central processing unit of a computer. The overhead of processing a separate interrupt request for each interrupt event is thus avoided. The preset limit and preset delay interval can be set under software control to control the rate at which interrupt requests can be asserted by the peripheral device.

Claims

1. In a computer system having a central processor and a peripheral device, a method of interrupting the central processor to process interrupt events of the peripheral device, comprising the steps of:

accumulating a count of pending interrupt events of the peripheral device;

timing a delay interval from a first pending interrupt event of the peripheral device, the delay interval being greater than a minimum period between interrupt events of the peripheral device;

comparing the count to a preset limit to produce at least first and second comparison results, the first comparison result indicating the count has achieved a relationship to the preset limit, the second comparison result indicating the count has not yet achieved said relationship, the second comparison result being produced when the count is of one pending interrupt event; and

sending an interrupt request to the central processor on an earlier occurring one out of an expiration of the delay interval and the comparison producing the first comparison result;

whereby the central processor can process the interrupt events of the peripheral device that are pending when the interrupt request is sent as a group.

2. The method of claim 1 wherein the first comparison result is indicative of the count exceeding the preset limit.

3. The method of claim 1 further comprising the step of selecting a desired value of the preset limit.

4. A computer-readable medium having computer-executable instructions for performing the steps recited in claim 1.

5. A peripheral device interrupt controller comprising:

a timer for timing a delay interval that is greater than a minimum period between interrupt events of a peripheral device controlled by the peripheral device controller;

a first timer controller for starting the timing of the delay interval by the timer on a first interrupt event of the controlled peripheral device; and

an interrupt event counter for accumulating a count of pending interrupt events of the controlled peripheral device;

a comparator for comparing the count to a limit and determining whether a comparison condition exists, the comparison condition indicating that the count has achieved a relationship to the limit, and the comparison condition excluding instances when the count is of one pending interrupt event;

an interrupt request generator for asserting an interrupt request to a central processor of a computer on expiration of the delay interval to thereby allow at least some of any additional interrupt events of the controlled peripheral device that occur within the delay interval to be processed with the first interrupt event as a group by the central processor; and

the interrupt request generator for additionally asserting an interrupt request to a central processor of a computer when the comparison condition exists to thereby cause the central processor to service at least some of the pending interrupt events of the controlled peripheral device as a group.

6. The peripheral device interrupt controller of claim 5 comprising:

a second timer controller for starting the timing of the delay interval by the timer when at least one interrupt event of the controlled peripheral device is pending on completion of servicing of a group of pending interrupt events of the controlled peripheral device by the central processor.

7. The peripheral device interrupt controller of claim 5 wherein the comparison condition includes the count exceeding the limit.

8. The peripheral device interrupt controller of claim 5 comprising:

means for setting a value of the limit under software control.

9. The peripheral device interrupt controller of claim 8 comprising:

a register writeable by software for storing a value determinative of the limit.

10. In a computer system having a central processor and a peripheral device, a method of interrupting the central processor to process interrupt events of the peripheral device, comprising the steps of:

setting a limit value and a delay time value by software executing on the central processor;

incrementing a count for each interrupt event of the peripheral device;

subtracting for each group of interrupt events serviced by the central processor a number of the serviced interrupt events from the count;

initiating timing of a time interval related to the delay time value for each time the count is incremented from zero to one and each time the step of subtracting yields a count greater than zero, the time interval being greater than a minimum period between interrupt events of the peripheral device;

detecting when the count exceeds a limit related to the limit value, the limit being greater than zero; and

sending an interrupt request to the central processor on an earlier occurring one out of an expiration of the time interval and the count exceeding the limit whereby the central processor is able to process in response to the interrupt request a group of interrupt events of the peripheral device that are pending on receipt of the interrupt request.

11. A computer-readable medium having computer-executable instructions for performing the steps recited in claim 10.