Epitaxial overgrowth method

• US 5,712,189 A
• Filed: 04/30/1993
• Issued: 01/27/1998
• Est. Priority Date: 04/30/1993
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Kim, Tae Seung, Plumton, Donald Lynn
• Primary Examiner(s): Quach, T. N.
• Application Number:
  US08/056,004
• Time in Patent Office: 1,733 Days
• Field of Search: 437/133, 437/40, 437/203, 748/DIG. 110
• US Class Current: 117/101
• CPC Class Codes: H01L 21/02546 Arsenides
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/74 Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
• CPC Class Codes: H01L 27/0605 integrated circuits made of compound material, e.g. AIIIBV
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/1066 Gate region of field-effect devices with PN junction gate
• CPC Class Codes: H01L 29/1075 of field-effect transistors
• CPC Class Codes: H01L 29/66318 Heterojunction transistors
• CPC Class Codes: H01L 29/66454 Static induction transistors [SIT], e.g. permeable base transistors [PBT]
• CPC Class Codes: H01L 29/66924 with an active layer made of a group 13/15 material H01L29/66446 takes precedence
• CPC Class Codes: H01L 29/7371 Vertical transistors
• CPC Class Codes: H01L 29/7722 using static field induced regions, e.g. SIT, PBT
• CPC Class Codes: H01L 29/8083 Vertical transistors SIT H01L29/7722
• CPC Class Codes: Y10S 117/902 Specified orientation, shape, crystallography, or size of seed or substrate

Abstract

A vertical field effect transistor (700) and fabrication method with buried gates (704) having gate sidewall crystal orientation the same as the substrate surface and a low index substrate crystal orientation without tilt to a higher index direction. The gate (704) may have modulated doping along the channel (706), and the drain (708) may have a lighter doping level than the channel which may be accomplished by an epitaxial overgrowth of the gates (704) to form the channels (706).

Claims

1. A method of III-V semiconductor epitaxial overgrowth, comprising the steps of:

(a) providing a semiconductor layer, said layer with a planar surface and with at least two parallel trenches extending into said planar surface, each of said trenches having sidewalls perpendicular to said planar surface and with a bottom parallel to said planar surface, said sidewalls forming a series of parallel sidewalls with each sidewall having crystal orientation equivalent to that of said planar surface within about 5°

; and

(b) epitaxially growing an epilayer of a semiconductor material simultaneously on said planar surface and said sidewalls and said bottoms;

(c) wherein said layer is made of a first III-V compound and said epilayer is made of a second III-V compound.

2. The method of claim 1, wherein:

(a) said first III-V compound is gallium arsenide containing dopants; and

(b) said second III-V compound is gallium arsenide containing dopants.

3. The method of claim 1, wherein:

(a) said planar surface has a (100) orientation.

4. The method of claim 3, wherein:

(a) said layer has p-type doping adjacent said surface and n-type doping away from said surface, wherein said n-type doping is exposed at the bottoms of said trenches.

5. The method of claim 4, wherein:

(a) said epilayer has n-type doping; and

(b) said epitaxially growing is by metalorganic chemical vapor deposition.

6. The method of claim 5, wherein:

(a) said layer has carbon doping adjacent said surface and silicon doping about said bottoms of said trenches; and

(b) said epilayer has silicon doping.

7. The method of claim 6, comprising the further steps of:

(a) epitaxially growing a second epilayer of a semiconductor material on said epilayer; and

(b) wherein said second epilayer is made of a third III-V compound and has n-type doping.

8. The method of claim 7, wherein:

(a) said first III-V compound is gallium arsenide containing dopants;

(b) said second III-V compound is gallium arsenide containing dopants; and

(c) said third III-V compound is aluminum gallium arsenide containing dopants.

9. A method of III-V semiconductor epitaxial overgrowth, comprising the steps of:

(a) providing a semiconductor layer, said layer with a planar surface and with at least two parallel fingers on said planar surface, each of said fingers having sidewalls perpendicular to said planar surface and with a top parallel to said planar surface, said sidewalls forming a series of parallel sidewalls with each sidewall having crystal orientation equivalent to that of said planar surface within about 5°

; and

(b) epitaxially growing an epilayer of a semiconductor material simultaneously on said planar surface and said sidewalls and said tops,

(c) wherein said layer is made of a first III-V compound and said epilayer is made of a second III-V compound.

10. The method of claim 9, wherein:

(a) said first III-V compound is gallium arsenide containing dopants; and

(b) said second III-V compound is gallium arsenide containing dopants.

11. The method of claim 9, wherein:

(a) said planar surface has a (100) orientation.

12. The method of claim 11, wherein:

(a) said fingers have p-type doping; and

(b) said layer has n-type doping.

13. The method of claim 12, wherein:

(a) said epilayer has n-type doping; and

(b) said epitaxially growing is by metalorganic chemical vapor deposition.

14. The method of claim 13, wherein:

(a) said fingers have carbon doping; and

(b) said layer adjacent said planar surface has silicon doping.

15. The method of claim 14, further comprising the step of:

(a) epitaxially growing a second epilayer of a semiconductor material on said epilayer;

(b) wherein said second epilayer is made of a third III-V compound and has n-type doping.

16. The method of claim 15, wherein:

(a) said first III-V compound is gallium arsenide containing dopants;

(b) said second III-V compound is gallium arsenide containing dopants; and

(c) said third III-V compound is aluminum gallium arsenide containing dopants.