Liquid crystal display device

• US 5,712,652 A
• Filed: 02/16/1996
• Issued: 01/27/1998
• Est. Priority Date: 02/16/1995
• Status: Expired due to Term

• Current Assignee: Japan Display Central Incorporated (Japan Display Incorporated)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Hayakawa, Shigeyuki, Ishizawa, Shuichiro, Ochii, Kiyofumi, Sato, Hajime, Aoki, Yoshiro, Harada, Nozomu
• Primary Examiner(s): Tung, Kee M.
• Assistant Examiner(s): Kovalick, Vincent E.
• Application Number:
  US08/602,599
• Time in Patent Office: 711 Days
• Field of Search: 345/30, 345/55, 345/87, 345/90, 345/96, 345/98, 345/204, 349/1, 349/19, 349/33, 349/41, 349/143
• US Class Current: 345/90
• CPC Class Codes: G06F 3/03542 Light pens for emitting or receiving light
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2310/0232 Special driving of display border areas
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A liquid crystal display device of low power consumption is disclosed, which is suitable for use with a portable data processing apparatus, in particular. The liquid crystal display device, comprises: a switch element array substrate (301) having a plurality of data lines (1) and a plurality of scanning lines (2) both arranged being intersected to each other in a matrix form so as to form matrix intersection points; a plurality of pixel electrodes (3) each arranged for each matrix intersection point; and a plurality of first switching elements (6, 7) each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on; a counter substrate (314) having a plurality of counter electrodes (12) each arranged being opposed to each pixel electrode with a gap between the two; a liquid crystal layer (13) sandwiched between the switching element array substrate and the counter substrate; a plurality of memory elements (100) each interposed between the corresponding first switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the first switching element is turned on; a plurality of display control lines (8, 10) each arranged in correspondence to each scanning line; and a plurality of second switching elements (9, 11) each arranged for each matrix intersection point, for controlling connection between the pixel electrode and the display control line on the basis of output of the memory element.

Claims

1. A liquid crystal display device, comprising:

a switch element array substrate having a plurality of data lines and a plurality of scanning lines both arranged being intersected to each other in a matrix form so as to form matrix intersection points of scanning lines and data lines;

a plurality of pixel electrodes each arranged for each matrix intersection point; and

a plurality of first switching elements each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on;

a counter substrate having a plurality of counter electrodes each arranged being opposed to each pixel electrode with a gap between the two;

a liquid crystal layer sandwiched between the switching element array substrate and the counter substrate;

a plurality of memory elements each interposed between the corresponding first switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the first switching element is turned on;

a plurality of display control lines each arranged in correspondence to each scanning line; and

a plurality of second switching elements each arranged for each matrix intersection point, for controlling connection between the pixel electrode and the display control line on the basis of output of the memory element.

2. The liquid crystal display device according to claim 1, wherein:

the display control lines are ac drive signal lines for displaying black and reset signal lines of a predetermined constant potential for displaying white, both in normally white display; and

each of the second switching elements is a logic circuit for selecting any one of the ac drive signal line and the reset signal line alternatively on the basis of the output of the memory element, to connect the selected signal line to the pixel electrode.

3. The liquid crystal display device according to claim 2, wherein the potential of a voltage applied to the reset signal line is roughly a mean potential of a voltage applied to the ac drive lines, and the potential of a voltage applied to the counter electrode is the same potential as the voltage applied to the reset signal line.

4. The liquid crystal display device according to claim 2, wherein the pixel electrode is of light reflective type pixel electrode having a light reflective film formed on at least one of the memory element and the second switching element via an electric insulating layer.

5. The liquid crystal display device according to claim 1, which further comprises a liquid crystal driving circuit for selectively supplying a voltage to the data line and the scanning line, respectively to drive the selected pixel electrode via the first switching element, the liquid crystal driving circuit being formed integral with the switching elements on the switching element array substrate by use of material the same as forming at least the switching elements.

6. The liquid crystal display device according to claim 2, which further comprises frequency changing means for reducing frequency of the ac drive signal line when the data lines and the scanning lines are both not designated on the basis of addresses.

7. The liquid crystal display device according to claim 6, wherein the frequency changing means comprises:

an oscillating circuit;

a frequency dividing circuit for dividing the frequency of an output signal of the oscillating circuit into a plurality of different frequencies;

an address signal detecting circuit for detecting address designation operation of the data lines and the scanning lines; and

switching means for selecting and outputting an ordinary frequency when the addresses are being designated and a lower frequency when the addresses are not being effected, both on the basis of an output of the address signal detecting circuit.

8. A liquid crystal display device, comprising:

a switch element array substrate having a plurality of data lines and a plurality of scanning lines both arranged being intersected to each other in a matrix form so as to form matrix intersection points;

a plurality of pixel electrodes each arranged for each matrix intersection point;

a plurality of switching elements each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on; and

a data line driving circuit and a scanning line driving circuit each for selectively supplying a voltage to the data line and the scanning line, respectively, to drive the selected pixel electrode via the switching element;

a counter substrate having a plurality of counter electrodes each arranged being opposed to each pixel electrode with a gap between the two;

a liquid crystal layer sandwiched between the switching element array substrate and the counter substrate;

a plurality of memory elements each interposed between the corresponding switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the switching element is turned on;

polarity inverting means for controlling connection with the pixel electrode on the basis of output of the memory element; and

a decoder circuit included in at least one of the data driving circuit and the scan driving circuit, for selecting at least one of the data line and the scanning line on the basis of a combination of numerical signals.

9. The liquid crystal display device according to claim 8, which further comprises a data diver circuit for turning on the data line on the basis of a selecting bit output of the decoder circuit of the data driving circuit and for turning off the data line or switching the data line to a high resistance state when the data line is not selected.

10. A liquid crystal display device, comprising:

a switch element array substrate having a plurality of data lines and a plurality of scanning lines both arranged being intersected to each other in a matrix form so as to form matrix intersection points;

a plurality of pixel electrodes each arranged for each matrix intersection point; and

a plurality of first switching elements each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on;

a counter substrate having a plurality of counter electrodes each arranged being opposed to each pixel electrode with a gap between the two;

a liquid crystal layer sandwiched between the switching element array substrate and the counter substrate;

a plurality of memory elements of flip-flop structure each interposed between the corresponding first switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the first switching element is turned on;

a plurality of polarity switching signal lines each arranged in correspondence to the scanning line, to which potential inverted voltage is applied for each predetermined time period; and

a plurality of second switching elements each for supplying the data held by the memory element to the pixel electrode by switching the polarity thereof in response to a polarity switching signal applied to the polarity switching signal line.

11. The liquid crystal display device according to claim 10, wherein the digital memory element is composed of two cross-connected inverter circuits each made up of two transistors, seven transistors in total of the digital memory elements of four transistors, the first switching element of one transistor, and the second switching element of two opposite-polarity transistors being all arranged for each pixel electrode.

12. The liquid crystal display device according to claim 10, wherein the pixel electrode is of light reflective type pixel electrode having a light reflective film formed on at least the digital memory element and the second switching element via an electric insulating layer.

13. The liquid crystal display device according to claim 10, which further comprises a liquid crystal driving circuit for selectively supplying a voltage to the data line and the scanning line, respectively to drive the selected pixel electrode via the first switching element, the liquid crystal driving circuit being formed integral with the switching elements on the switching element array substrate by use of material the same as forming at least the switching elements.

14. The liquid crystal display device according to claim 13, wherein in the liquid crystal driving circuit, a plurality of shift registers are arranged in an array form, and each output stage of the shift registers is connected one by one to at least one of the scanning line and the data line.

15. The liquid crystal display device according to claim 13, wherein the liquid crystal driving circuit comprises a decoder circuit for selecting any line of at least either one of the data lines and the scanning lines on the basis of a combination of numerical signals indicative of only an address of a pixel at which an image changes.

16. The liquid crystal display device according to claim 10, wherein the relationship of gate turn-on drive capability of the respective switching elements is set to G1>

G2>

G3, where G1 denotes the gate turn-on drive capability of the switching elements connected to the scanning line and the data line, G2 denotes the gate turn-on drive capability of the respective switching elements for forming the digital memory cell element; and

G3 denotes the gate turn-on drive capability of a pair of the switching elements.

17. The liquid crystal display device according to claim 10, wherein the respective switching elements are formed as a thin film transistors, respectively.

18. A liquid crystal display device, comprising:

a switch element array substrate having a plurality of data lines and a plurality of scanning lines both arranged being intersected to each other in a matrix form so as to form matrix intersection points;

a plurality of pixel electrodes each arranged for each matrix intersection point; and

a plurality of first switching elements each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on;

a counter substrate having a plurality of counter electrodes each arranged being opposed to each pixel electrode with a gap between the two;

a liquid crystal layer sandwiched between the switching element array substrate and the counter substrate;

a plurality of memory elements each interposed between the corresponding first switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the first switching element is turned on;

a plurality of display control lines each arranged in correspondence to each scanning line;

a plurality of second switching elements each arranged for each matrix intersection point, for controlling connection between the pixel electrode and the display control line on the basis of output of the memory element; and

a plurality of photoelectric transfer elements each one end terminal of which is connected to an input side of the memory element.