Device for suppressing higher harmonic current of power source

• US 5,712,774 A
• Filed: 02/18/1997
• Issued: 01/27/1998
• Est. Priority Date: 02/24/1994
• Status: Expired due to Fees

• Current Assignee: Ricoh Company Limited
• Original Assignee: Ricoh Company Limited
• Inventors: Uramoto, Hiroshi
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): Riley, Shawn
• Application Number:
  US08/802,791
• Time in Patent Office: 343 Days
• Field of Search: 363/46, 363/53, 363/89, 323/209, 323/299, 323/288, 323/300
• US Class Current: 363/46
• CPC Class Codes: H02M 1/4208 Arrangements for improving power factor of AC input
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A device for suppressing higher harmonic current of a power source and applicable to a switching power source, air conditioner with an inverter, lamp regulator or the like. The device suppresses higher harmonic current by increasing the conduction angle of input current.

Claims

1. A device for suppressing higher harmonic current of a power source, comprising:

switching means for causing a capacitor, included in a capacitor input type rectifying circuit for a commercial power source, to selectively charge or discharge;

voltage detecting means for receiving and detecting a sinusoidal voltage out of the commercial power source and generating an output signal only when an absolute value of said received and detected sinusoidal voltage is lower than a predetermined voltage; and

control means for turning on said switching means in response to receiving the output signal from said voltage detecting means to thereby cause the capacitor to release a charge only when the sinusoidal voltage is lower than the predetermined voltage.

2. A device as claimed in claim 1, wherein said switching means comprises a MOS FET.

3. A device as claimed in claim 1, wherein said switching means comprises an n-p-n transistor.

4. A device as claimed in claim 1, wherein said switching means comprises a p-n-p transistor.

5. A device as claimed in claim 1, wherein when the absolute value of said sinusoidal voltage is higher than the predetermined voltage, said control means turns off said switching means to thereby cause the capacitor to be charged.

6. A device for suppressing higher harmonic current of a power source, comprising:

a switch causing a capacitor, included in a capacitor input type rectifying circuit for a commercial power source, to selectively charge or discharge;

a voltage detector receiving and detecting a sinusoidal voltage out of the commercial power source and generating an output signal only when an absolute value of said received and detected sinusoidal voltage is lower than a predetermined voltage; and

a controller turning on said switching means in response to receiving the output signal from said voltage detector to thereby cause the capacitor to release a charge only when the sinusoidal voltage is lower than the predetermined voltage.

7. A device as claimed in claim 6, wherein said switch comprises a MOS FET.

8. A device as claimed in claim 6, wherein said switch comprises an n-p-n transistor.

9. A device as claimed in claim 6, wherein said switch comprises a p-n-p transistor.

10. A device as claimed in claim 6, wherein when the absolute value of said sinusoidal voltage is higher than the predetermined voltage, said control means turns off said switching means to thereby cause the capacitor to be charged.