Waveform-generating apparatus

• US 5,714,954 A
• Filed: 12/18/1995
• Issued: 02/03/1998
• Est. Priority Date: 12/12/1995
• Status: Expired due to Fees

• Current Assignee: Holtek Microelectronics, Inc. (United Microelectronics Corporation)
• Original Assignee: Holtek Microelectronics, Inc. (United Microelectronics Corporation)
• Inventors: Wu, Rong-Tyan, Chung, Herman
• Primary Examiner(s): Young, Brian K.
• Application Number:
  US08/574,393
• Time in Patent Office: 778 Days
• Field of Search: 341/147, 341/144, 388/915
• US Class Current: 341/147
• CPC Class Codes: G06F 1/0321 Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers G06F1/0314, G06F1/035 take precedence

Abstract

A cost effective waveform-generating apparatus that generates accurate and precise waveforms is disclosed. The present waveform-generating apparatus includes a memory for storing a sequence of sampled amplitudes of a waveform, said sampled amplitudes constituting at least two periods of said waveform; a counting circuit, electrically connected to the memory, responsive to a clock signal for generating counting signals; a controlling circuit, electrically connected to the memory and the counting circuit, responsive to the counting signals for controlling the memory to output the sampled amplitudes recurrently; and a digital to analog converter, electrically connected to the memory, for converting the recurrent sampled amplitudes into an analog output.

Claims

1. A waveform-generating apparatus for generating a waveform having a fundamental period substantially indivisible by a period of a clock signal of said waveform-generating apparatus, comprising:

a memory for storing a sequence of sampled amplitudes of said waveform, said sampled amplitudes being sampled from a sampled waveform in a duration including a plurality of said fundamental periods, wherein said duration is substantially divisible by said clock signal period;

a counting circuit, electrically connected to said memory, responsive to said clock signal for generating a counting signal;

a controlling circuit, electrically connected to said memory and said counting circuit, responsive to said counting signal for controlling said memory to output said sampled amplitudes recurrently; and

a digital to analog converter, electrically connected to said memory, for converting said recurrent sampled amplitudes into an analog output.

2. The apparatus of claim 1, wherein a number of said sampled amplitudes is fundamental period of said waveform/fundamental period of said system clock!×

N and N is a minimum value which allows fundamental period of said waveform/fundamental period of said system clock!×

N to be an integer.

3. The apparatus of claim 1, wherein a number of said sampled amplitudes is fundamental period of said waveform/fundamental period of said system clock!×

N and N is a minimum value which allows fundamental period of said waveform/fundamental period of said system clock!×

N to be a value close to an integer.

4. The apparatus of claim 1, wherein said waveform is selected from a group consisting of a sinusoidal wave, a square wave and a sawtooth wave.

5. The apparatus of claim 1, wherein said memory is selected from a group consisting of ROM, EPROM, EEPROM, PLA, and RAM.

6. The apparatus of claim 1, wherein said counting circuit is a counter.

7. The apparatus of claim 1, wherein said counting circuit is a programmable counter which can generate at least one kind of a counting signal.

8. The apparatus of claim 1, wherein said apparatus is used in a dual-tone multi-frequency generator.

9. A waveform-generating application for generating a waveform having a fundamental period substantially indivisible by a half period of a clock signal of said waveform-generating apparatus, comprising:

a memory for storing a sequence of sampled amplitudes of said waveform, said sampled amplitudes being sampled from a sampled waveform in a duration including a plurality of said fundamental periods, wherein said duration is substantially divisible by said half clock signal period;

a counting circuit, electrically connected to said memory, responsive to said clock signal for generating a counting signal;

a controlling circuit, electrically connected to said memory and said counting circuit, responsive to said counting signal for controlling said memory to output said sampled amplitudes recurrently; and

a digital to analog converter, electrically connected to said memory, for converting said recurrent sampled amplitudes into an analog output.

10. An apparatus according to claim 9 wherein said clock signal has a rising edge and a falling edge, and a last one of said sampled amplitudes representing said endpoint of said sampled waveform is outputted at said falling edge.