Process and apparatus for collision detection on a parallel bus by monitoring a first line of the bus during even bus cycles for indications of overlapping packets

• US 5,715,407 A
• Filed: 08/08/1996
• Issued: 02/03/1998
• Est. Priority Date: 03/06/1992
• Status: Expired due to Fees

• Current Assignee: Rambus Inc.
• Original Assignee: Rambus Inc.
• Inventors: Barth, Richard Maurice, Griffin, Matthew Murdy, Horowitz, Mark Alan, Ware, Frederick Abbott
• Primary Examiner(s): BARRY, LANCE LEONARD
• Application Number:
  US08/695,235
• Time in Patent Office: 544 Days
• Field of Search: 340/825.52, 395/200.06, 395/287, 395/290, 395/299, 395/856, 370/445, 370/447
• US Class Current: 710/110
• CPC Class Codes: G06F 12/0215 with look ahead addressing means
• CPC Class Codes: G06F 13/161 with latency improvement
• CPC Class Codes: G06F 13/376 using a contention resolving method, e.g. collision detection, collision avoidance

Abstract

A high speed bus system in which at least one master device, such as a processor and at least one DRAM slave device are coupled to the bus. An innovative packet format and device interface which utilizes a plurality of time and space saving features in order to decrease the die size of the device receiver and decrease the overall latency on the bus is provided. In the preferred embodiment the request packet is transmitted on ten multiplexed transmission lines, identified as BusCtl and BusData 8:0!. The packet is transmitted over six sequential bus cycles, wherein during each bus cycle, a different portion of the packet is transmitted. The lower order address bits are moved ahead of the higher order address bits of the memory request. This enables the receiving device to process the memory request faster as the locality of the memory reference with respect to previous references can be immediately determined and page mode accesses on the DRAM can be initiated as quickly as possible. The type of memory access is arranged over a plurality of clock cycles, placing the more critical bits first. The count of blocks of data requested is arranged to minimize the number of bit positions in the packet used and therefore the number of transmission lines of the bus and the number of bus receiver contacts on the receiving device.

Claims

1. In a computer system comprising a plurality of devices comprising a plurality of master devices and at least one slave device coupled to the master devices by a plurality of bus lines, a process for detection of collision of packets transmitted between devices said packets comprising information to perform an operation, said process comprising the steps of:

a first device of the plurality of devices transmitting a first word of a packet, comprising the steps of;

said first device transmitting start information onto a first bus line of the plurality of bus lines, said start information indicating the start of the packet, and

said first device transmitting address information of the operation to be performed onto a group of second bus lines of the plurality of bus lines;

said first device transmitting subsequent words of the packet on the plurality of bus lines, by transmitting information on the first bus line during predetermined subsequent words and by transmitting information on the plurality of second bus lines;

at least one of the devices of the plurality of devices monitoring the first bus line during transmission of subsequent words of the packet for information; and

said at least one of the devices detecting a collision when information occurs on the first bus line during transmission of subsequent words of the packet other than the predetermined subsequent words of the packet, said information occurring due to the start information of a second packet overlapping the first packet.

2. The process as set forth in claim 1, wherein bus cycles during which words of the packet are transmitted comprise even and odd bus cycles and said first word of the packet is transmitted on even bus cycles, said step of detecting a collision detects a collision if information occurs on the first bus line during transmission of the subsequent words of the packet during even bus cycles.

3. The process as set forth in claim 2, wherein the step of said first device transmitting the subsequent words of the packet comprises the step of transmitting other information onto the first bus line during subsequent words of the packet which are transmitted during odd bus cycles.

4. The process as set forth in claim 1, further comprising the steps of:

transmitting a code identifying the device transmitting the packet; and

detecting the code to determine whether the code is valid, an invalid code resulting from the collision of packets.

5. The process as set forth in claim 1, wherein the first device is a master device and at least one of the devices is a slave device.

6. The method as set forth in claim 1, further comprising the step of:

said at least one of the devices discarding the packet transmitted by the first device if a collision is detected.

7. The method as set forth in claim 1, further comprising the step of:

said first device monitoring the first bus line during transmission of words of the packet for information other than the start of the packet;

said first device detecting a collision if information occurs on the first bus line during transmission of predetermined words of the packet; and

said first device aborting transmission of the packet if a detection is detected.

8. In a computer system comprising a plurality of devices comprising master devices and at least one slave device, a bus system comprising a plurality of bus lines coupling the devices and for transmitting packets, from a first master device of the master devices to the slave device, comprising a plurality of words, including information regarding an operation to be performed:

said packet comprising;

start information transmitted in the first word of the packet on a first bus line of the plurality of bus lines, said start information indicating the start of the packet, and

address information in at least one of the plurality of words of the packet transmitted on a second bus line of the plurality of bus lines;

said bus system comprising;

means for monitoring the first bus line during transmission of subsequent words of the packet on the plurality of bus lines subsequent to the first word for information other than the start of the packet, and

means for detecting a collision when information occurs on the first bus line during transmission of predetermined words of the packet, subsequent to the first word, said information occurring due to the start information of a second packet overlapping the first packet.

9. The system as set forth in claim 8, wherein said packet further comprises a code identifying the device transmitting the packet, said system further comprising means for detecting the code to determine whether the code is valid, an invalid code resulting from a collision of packets.

10. The bus system as set forth in claim 8, wherein the start information and address information is transmitted from a first device to a second device, and the second device comprises the means for monitoring and the means for detecting.

11. The bus system as set forth in claim 10, wherein said first device comprises the means for monitoring and means for detecting.

12. The bus system as set forth in claim 10, wherein said second device discards the packet transmitted by the first device if a collision is detected.

13. In a computer system comprising a plurality of master devices and at least one slave device coupled to the master devices through a plurality of bus lines, a process for detection of collision of information transmitted between a master device of the plurality of master devices and the slave device, said process comprising the steps of:

a first master device transmitting a first word of first information to the slave device, comprising the steps of;

transmitting start data onto a first bus line of the plurality of bus lines, said start data indicating the start of the first information; and

transmitting address data regarding an operation to be performed by the slave device onto a group of second bus lines of the plurality of bus lines;

said first master device transmitting subsequent words of the packet by transmitting data on the first bus line during predetermined subsequent words and by transmitting data on the group of second of bus lines;

said slave device monitoring the first bus line during transmission of subsequent words on the plurality of bus lines for data other than the first information; and

said slave device detecting a collision if data occurs on the first bus line during transmission of the subsequent words of the packet other than the predetermined subsequent words, said information occurring due to the start data of a second information transmitted by a second device overlapping the first information.

14. The method as set forth in claim 13, wherein the first information comprises a packet and the second information comprises a packet.

15. The method as set forth in claim 14, wherein the slave device is a memory device and the packets comprise memory requests.

16. The method as set forth in claim 14, further comprising the step of:

said slave device discarding the packet transmitted by the first master device if a collision is detected.

17. The method as set forth in claim 14, further comprising the step of:

said first master device monitoring the first bus line during transmission of words of the packet for information other than the start of the packet;

said first master device detecting a collision if information occurs on the first bus line during transmission of predetermined words of the packet; and

said master device aborting transmission of the packet if a detection is detected.

18. The method as set forth in claim 13, wherein bus cycles during which words of the packet are transmitted comprise even and odd bus cycles and said first word of a packet is transmitted on even bus cycles, said step of detecting a collision detects a collision if information occurs on the first bus line during transmission of subsequent words of the packet during even bus cycles.

19. The method as set forth in claim 18, wherein the step of said first device transmitting subsequent words of the packet comprises the step of transmitting other information onto the first bus line during subsequent words of the packet which are transmitted during odd bus cycles.

20. The method as set forth in claim 18, further comprising the steps of:

transmitting a code identifying the device transmitting the packet; and

detecting the code to determine whether the code is invalid, an invalid code resulting from the collision of packets.

21. In a computer system comprising a plurality of master devices and at least one slave device, a system for transmitting packets comprising a plurality of words from a master device to the slave device, said system comprising:

a plurality of bus lines coupling the plurality of master devices and the at least one slave device and for transmission of packets from the master device to the slave device;

each of said packets comprising;

start information indicating the start of the packet transmitted in a first word of the packet on a first bus line of the plurality of bus lines, and

address information regarding an operation to be performed by the slave device transmitted in at least one word of the plurality of words of the packet on a group of second bus lines of the plurality of bus lines;

said slave device monitoring the first bus line during transmission of words on the plurality of bus lines of a first packet subsequent to the first word for information other than the start of the first packet and detecting a collision if information occurs on the first bus line during transmission of predetermined words of the first packet subsequent to the first word, said information occurring due to the start information of a second packet overlapping the first packet.

22. The bus system as set forth in claim 21, wherein said slave device discards the packet transmitted by the first master device if a collision is detected.

23. The bus system as set forth in claim 21, wherein bus cycles during which words of the packet are transmitted comprise even and odd bus cycles, and said predetermined words of the first packet comprise those words transmitted on even bus cycles.

24. The bus system as set forth in claim 23, wherein said first packet further comprises supplemental information transmitted on the first bus line during odd bus cycles subsequent to transmission of the first word of the packet.

25. The bus system as set forth in claim 21, wherein said packet further comprises a code identifying the device transmitting the packet, said code transmitted on the plurality of bus lines, said slave device further detecting the code to determine whether the code is valid, an invalid code resulting from a collision of packets.