Semiconductor device having an insulated gate field effect thin film transistor

• US 5,717,224 A
• Filed: 09/06/1996
• Issued: 02/10/1998
• Est. Priority Date: 04/29/1994
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Zhang, Hongyong
• Primary Examiner(s): TRAN, MINH LOAN
• Application Number:
  US08/709,113
• Time in Patent Office: 522 Days
• Field of Search: 257/57, 257/59, 257/72, 257/435, 257/66, 359/67, 359/87, 359/54, 359/59, 349/42, 349/43, 349/44
• US Class Current: 257/57
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78633 with a light shield

Abstract

A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.

Claims

1. A semiconductor device formed on an insulating substrate comprising:

a semiconductor region having a source, a drain and a channel located between said source and said drain;

a gate electrode provided adjacent to said channel with a gate insulating layer therebetween;

a first interlayer insulating film comprising an organic resin film or a multilayer of a silicon oxide layer and an organic resin layer provided over said gate electrode;

a source electrode connected to said source and provided on said first interlayer insulating film, said source electrode functioning to shield at least said channel from external light; and

a second interlayer insulating film formed on said first interlayer insulating film wherein a portion of said source electrode is interposed between said first and second interlayer insulating film,

wherein said second interlayer insulating film comprises a material selected from the group consisting of silicon nitride, aluminum nitride, aluminum oxide and aluminum nitride.

2. A semiconductor device according to claim 1 wherein said gate electrode is provided over the channel of said semiconductor region with a gate insulating film interposed therebetween.

3. A semiconductor device formed on an insulating substrate comprising:

a semiconductor region having a source, a drain and a channel located between said source and said drain;

a gate electrode provided adjacent to said channel with a gate insulating layer therebetween;

a first interlayer insulating film provided over said gate electrode, said first interlayer insulating film comprising an organic resin layer or a multi-layer of a silicon oxide layer and an organic resin layer;

light shielding conductive film provided on said first interlayer insulating film for shielding at least said channel region from external light;

a second interlayer insulating film provided on said first interlayer insulating film with said light shielding conducting film interposed therebetween, said second interlayer insulating film comprising a material selected from the group consisting of silicon nitride, aluminum nitride, aluminum oxide and aluminum nitride; and

a pixel electrode connected to said drain and provided on said second interlayer insulating film.

4. The device of claim 3 further comprising a second light shielding film below said channel.

5. The device of claim 4 wherein said second light shielding film is grounded.

6. A semiconductor device according to claim 3 wherein said gate electrode is provided over the channel of said semiconductor region with a gate insulating film interposed therebetween.

7. A semiconductor device according to claim 3 wherein said pixel electrode is connected to the drain of the semiconductor region through a contact hole opened through said first and second interlayer insulating films.

8. A thin film transistor provided on a substrate comprising:

a source and a drain;

a source line connected to one of said source and said drain;

a pixel electrode connected to the other of said source and said drain;

a first interlayer provided over said source and said drain and comprising an organic resin layer or a multilayer of a silicon dioxide layer and an organic resin layer; and

a second interlayer provided on said first interlayer and comprising a material selected from the group consisting of silicon nitride, aluminum oxide and aluminum nitride.

9. The transistor of claim 8 further comprising a gate electrode provided on a silicon layer comprising said source and said drain.

10. A thin film transistor provided on a substrate comprising:

a source and a drain;

a source line connected to one of said source and said drain;

a pixel electrode;

a conductor extending from said pixel electrode and connected to the other of said source and said drain;

a first interlayer having a planarized surface and provided over said source and said drain and comprising an organic resin layer or a multilayer of a silicon dioxide layer and an organic resin layer; and

a second interlayer provided on said first interlayer.

11. The transistor of claim 10 further comprising a gate electrode provided on a silicon layer comprising said source and said drain.

12. The transistor of claim 10 wherein said second interlayer comprises a material different from silicon oxide.