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Digital/analog bit synchronizer

  • US 5,719,908 A
  • Filed: 07/19/1995
  • Issued: 02/17/1998
  • Est. Priority Date: 07/19/1995
  • Status: Expired due to Fees
First Claim
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1. A high speed bit synchronizer for generating a coherent clock synchronized with a received digital data stream, comprising:

  • a digital phase detector having an input for receiving said digital data stream and producing a clocked data output,first summing means having a first input coupled to the clocked data output of said digital phase detector,offset eliminating means having an input coupled to the phase detector and a correction signal output coupled to a second input of said first summing means,a loop filter,said first summing means having positive inputs and a summed voltage output coupled to said loop filter,a voltage controlled oscillator having an input coupled to the filtered summed voltage output and having the coherent clock with a steady state phase offset, andthe output of said first summing means having a linear output phase offset S-curve around the lock point of said phase detector, whereby seeking is substantially eliminated.

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