Active pixel sensor cell that reduces the effect of 1/f noise, increases the voltage range of the cell, and reduces the size of the cell
First Claim
1. A method for converting light energy into a pixel signal with an active pixel sensor cell formed in a semiconductor substrate of a first conductivity type, wherein the active pixel sensor cell includes:
- a well region of a second conductivity type formed in the substrate;
a reset region of the first conductivity type formed in the well region;
a buffer transistor having a gate connected to the well region; and
a row select transistor connected to the buffer transistor, the row select transistor having a gate,the method comprising the steps of;
applying a first voltage to the substrate;
resetting the well region to a voltage which is greater than the first voltage; and
applying a read voltage to the gate of the row select transistor for a predetermined time a predefined time after the well region is reset.
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Abstract
The accuracy of an active pixel sensor cell is increased by utilizing a reset diode in lieu of the reset transistor that is conventionally used to reset the voltage on the photodiode of the cell. The reset diode, which is largely unaffected by 1/f noise, consistently resets the photodiode to a substantially constant voltage as opposed to the reset transistor which varies the reset voltage on the photodiode across integration periods due to the effect of 1/f noise. In the present invention, the photodiode is formed by forming a well region of a second conductivity type in a substrate of a first conductivity type. The reset diode is then formed by forming a reset region of the first conductivity type in the well region.
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Citations
2 Claims
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1. A method for converting light energy into a pixel signal with an active pixel sensor cell formed in a semiconductor substrate of a first conductivity type, wherein the active pixel sensor cell includes:
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a well region of a second conductivity type formed in the substrate; a reset region of the first conductivity type formed in the well region; a buffer transistor having a gate connected to the well region; and a row select transistor connected to the buffer transistor, the row select transistor having a gate, the method comprising the steps of; applying a first voltage to the substrate; resetting the well region to a voltage which is greater than the first voltage; and applying a read voltage to the gate of the row select transistor for a predetermined time a predefined time after the well region is reset. - View Dependent Claims (2)
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Specification
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- Resources
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Current AssigneeFoveon, Inc. (Avis Budget Group Incorporated)
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Original AssigneeNational Semiconductor Corporation (Texas Instruments, Inc.)
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InventorsMerrill, Richard Billings
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Primary Examiner(s)Ngo , Ngan V.
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Application NumberUS08/609,553Time in Patent Office725 DaysField of Search257/290, 257/291, 257/292, 257/461, 257/465, 250/214 R, 250/214.1US Class Current250/214.1CPC Class CodesH01L 27/14643 Photodiode arrays; MOS imagers
