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Control gate driver circuit for a non-volatile memory and memory using same

  • US 5,721,704 A
  • Filed: 08/23/1996
  • Issued: 02/24/1998
  • Est. Priority Date: 08/23/1996
  • Status: Expired due to Term
First Claim
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1. A control gate driver circuit for providing a predetermined voltage to a control gate of an erasable programmable non-volatile memory cell during a read mode thereof, comprising:

  • a pass transistor of a predetermined conductivity type having a gate electrode coupled to a first voltage reference terminal, a first current electrode, a second current electrode coupled to the control gate, and a bulk electrode coupled to the first current electrode; and

    a bias circuit having an output terminal coupled to the first current electrode of the pass transistor, wherein the bias circuit generates the predetermined voltage on the output terminal, wherein the predetermined voltage is substantially equal to a threshold voltage of the pass transistor plus an incremental voltage.

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