Information processing apparatus with write protection function of specific storage area

• US 5,721,872 A
• Filed: 08/28/1995
• Issued: 02/24/1998
• Est. Priority Date: 09/09/1994
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Corporation
• Inventors: Katsuta, Hiroshi
• Primary Examiner(s): Swann, Tod R.
• Assistant Examiner(s): Chow, Christopher S.
• Application Number:
  US08/519,769
• Time in Patent Office: 911 Days
• Field of Search: 395/481, 395/491, 395/186, 395/188.01, 395/490, 326/8
• US Class Current: 711/163
• CPC Class Codes: G06F 12/1441 for a range

Abstract

An information processing apparatus with a write protection function for a target storage area is provided, which includes a holding section for a write enable flag for indicating whether writing is to be permitted to the target storage area, and a write control section for permitting an intended write operation to the target storage area when the write enable flag held by the holding section indicates the same is to be permitted. The apparatus further includes a setting section for setting the write enable flag in the holding section when a dummy write instruction is executed for a command address, and a resetting section for resetting the write enable flag in the holding section when the intended write operation to the target storage area is executed. The resetting section may further include a section for resetting the write enable flag in the holding section when a predetermined number of instructions or bus cycles are executed after the dummy write instruction.

Claims

1. An information processing apparatus for protecting a target storage area from an erroneous write operation in execution of an application program composed of a sequence of instructions, comprising:

instruction decoding means for decoding the instructions one by one and for issuing a write signal when the decoded instruction is a write instruction to any storage area;

first address decoding means for decoding each of addresses on an address bus;

second address decoding means for decoding each of addresses on said address bus;

a write enable flag for holding data indicative of whether writing to said target storage area is to be permitted or prohibited;

setting means for setting said flag to indicate that said writing is to be permitted, at a first predetermined timing of a bus cycle associated with decoded address by said first address decoding means when a first write instruction of the decoded instructions by said instruction decoding means is a write instruction to a specific storage area;

resetting means for resetting said flag to indicate that said writing is to be prohibited, at a second predetermined timing of a bus cycle associated with decoded address by said second address decoding means when a second write instruction of the decoded instructions by said instruction decoding means is a write instruction to said target storage area; and

write operation permitting means for preventing said writing to said target storage area when said flag holds data indicative that said writing is to be prohibited, and for permitting said writing to said target storage area when said flag holds data indicative that said writing is to be permitted;

wherein said apparatus is adapted to automatically prevent said writing to said target storage area in response to completion of write operation resulting from said second write instruction; and

wherein said resetting means further includes means for resetting said flag to indicate that said writing is to be prohibited when said second write instruction is not executed for a predetermined number of instructions from when said flag is set to indicate that said writing is to be permitted.

2. The information processing apparatus according to claim 1, wherein the predetermined number of instructions is one.

3. The information processing apparatus according to claim 1, wherein said first address decoding means decodes each of the addresses on said address bus to determine that the decoded address designates said specific storage area.

4. The information processing apparatus according to claim 3, wherein the specific storage area is designated by an empty address to which no unit is assigned.

5. The information processing apparatus according to claim 1, wherein said write operation permitting means includes delay means for delaying supply of the data from said flag to synchronize said data with the write signal from said instruction decoding means.

6. A method of protecting a target storage area from an erroneous write operation in an information processing apparatus comprising the steps of:

holding data, indicative that a desired write operation is to be permitted to said target storage area, in response to execution of at least one dummy write operation to a specific storage area;

permitting said desired write operation to said target storage area only when said data is held; and

automatically resetting, in response to completion of the desired write operation, said data to indicate that writing to said target storage area is to be prohibited and;

resetting said data to indicate that said writing is to be prohibited, when a predetermined number of instructions are executed without occurrence of said desired write operation after said data are held.

7. The method according to claim 6, wherein said desired write instruction follows said dummy write instruction without interposition of any instruction.

8. The method according to claim 6, wherein said desired write instruction and said dummy write instruction are automatically generated from a statement corresponding to said desired write instruction in a user program by a compiler.

9. An information processing apparatus with a write protection function to a target storage area, comprising:

holding means for holding data having a first state for indicating that writing is to be permitted to said target storage area and at least one write operation has been executed for a specific storage area;

write control means for permitting a desired write operation to said target storage area when said holding means holds said data having said first state;

first resetting means for resetting said data to another state for indicating that said writing is to prohibited, in response to completion of the desired write operation; and

second resetting means for resetting said data to said other state when the desired write operation is not executed for a predetermined number of instructions after the write operation has been executed for the specific storage area.

10. The information processing apparatus according to claim 9, wherein the predetermined number of instruction is one.

11. The information processing apparatus according to claim 9, further comprising:

setting means for setting said data to said first state in said holding means when a dummy write instruction accompanying the write operation to said specific storage area is executed.

12. The information processing apparatus according to claim 9, wherein said desired write instruction and said dummy write instruction are automatically generated from a statement corresponding to said desired write instruction in a user program by a compiler.