Method and system for using a single code generator to provide multi-phased independently controllable outputs in a navigation satellite receiver
First Claim
Patent Images
1. A dual-frequency navigation satellite receiver, comprising:
- an antenna and low-noise amplifier for receiving dual-channel spread spectrum transmissions from a plurality of orbiting navigation satellites;
downconversion means connected to the antenna and low-noise amplifier for removing the carriers from an L1 and an L2 channel pair in said transmissions;
a pair of L1 and L2 code mixers connected to the downconversion means for removing a pseudo-random spreading code from said downconverted transmissions;
an L1 code numeric controlled oscillator (NCO) and an L2 code NCO respectively connected to a phase resolver that provides for counting the excess of L1 code clocks over the L2 code clocks with a digital counter;
a single pseudo-random spreading code generator connected to the L1 NCO and providing for an L1 pseudo-random spreading code output signal connected to the L1 code mixer; and
digital signal delay means connected to said phase resolver and the single pseudo-random spreading code generator and providing for an L2 pseudo-random spreading code output signal connected to the L2 code mixer, wherein the phase resolver incrementally adjusts the output of the pseudo-random spreading code generator to produce said L2 pseudo-random spreading code output signal.
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Abstract
A navigation satellite receiver for demodulating spread spectrum transmissions on pairs of L-band microwave carrier frequency channels, L1 and L2, which use the same pseudorandom number spreading code. A single P(Y)-code generator is used to produce independent P(Y)-code outputs for L1 and L2. The relative P(Y)-code phase between the outputs is adjusted by a phase resolver to account for the dissimilar delays the ionosphere imposes on each of L1 and L2. The phase resolver counts the excess of L1 code clocks over the L2 code clocks with a digital counter and adjusts a digital delay line to compensate.
53 Citations
10 Claims
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1. A dual-frequency navigation satellite receiver, comprising:
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an antenna and low-noise amplifier for receiving dual-channel spread spectrum transmissions from a plurality of orbiting navigation satellites; downconversion means connected to the antenna and low-noise amplifier for removing the carriers from an L1 and an L2 channel pair in said transmissions; a pair of L1 and L2 code mixers connected to the downconversion means for removing a pseudo-random spreading code from said downconverted transmissions; an L1 code numeric controlled oscillator (NCO) and an L2 code NCO respectively connected to a phase resolver that provides for counting the excess of L1 code clocks over the L2 code clocks with a digital counter; a single pseudo-random spreading code generator connected to the L1 NCO and providing for an L1 pseudo-random spreading code output signal connected to the L1 code mixer; and digital signal delay means connected to said phase resolver and the single pseudo-random spreading code generator and providing for an L2 pseudo-random spreading code output signal connected to the L2 code mixer, wherein the phase resolver incrementally adjusts the output of the pseudo-random spreading code generator to produce said L2 pseudo-random spreading code output signal.
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2. A pseudo-random spreading code generator for a dual-frequency navigation satellite receiver, comprising:
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an L1-code oscillator having a clock input connected to receive a sample clock signal and a reset input connected to a reset signal; an L2-code oscillator having a clock input connected to receive said sample clock signal and a reset input connected to said reset signal; a phase resolver having a pair of inputs connected to receive outputs from the L1-code and L2-code oscillators and a reset input connected to receive said reset signal, wherein excess of L1 code clocks over the L2 code clocks are counted with a digital counter clocked by said sample clock; a pseudo-random spreading code generator connected to receive said output of the L1-code oscillator and having an output providing for a spreading code signal; a serial shift register connected to receive said spreading code signal and connected to shift one stage to the next with said code clocks from said output of the L1-code oscillator, and providing a plurality of parallel outputs; a multiplexer having a plurality of inputs connected to receive said plurality of parallel outputs from the shift register, and having an output selected by a connection to said digital counter in the phase resolver; an L1-code output connected to a particular one of said plurality of parallel outputs from the shift register; and an L2-code output connected to said selection output of the multiplexer; wherein the L1-code output and the L2-code output provide phase independent pseudo-random spreading code signals from the single pseudo-random spreading code generator.
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3. A pseudo-random, spreading code generator for a dual-frequency navigation satellite receiver, comprising:
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an L1-code oscillator having a clock, input connected to receive a sample clock signal and a reset input connected to a reset signal; an L2-code oscillator having a clock input connected to receive said sample clock signal and a reset input connected to said reset signal; a phase resolver having a pair of inputs connected to receive outputs from the L1-code and L2-code oscillators and a reset input connected to receive said reset signal, wherein excess of L1 code clocks over the L2 code clocks are counted with a one-bit digital counter clocked by said sample clock; a pseudo-random spreading code generator connected to receive said output of the L1-code oscillator and having an output providing for a spreading code signal; a flip-flop connected to receive said spreading code signal and having a clock input connected to a code clock output of the L1-code oscillator; a first multiplexer connected to receive said spreading code signal and an output of said flip-flop and connected to select between said inputs according to the state of said one-bit counter in the phase resolver; a serial shift register connected to receive a selected output of the first multiplexer and connected to shift one stage to the next with said sample clock, and providing a plurality of parallel outputs; a second multiplexer having a plurality of inputs connected to receive said plurality of parallel outputs from the serial shift register, and having an output selected from one of said parallel inputs; an L1-code output connected from an output of said flip-flop; and an L2-code output connected to said selection output of the second multiplexer; wherein the L1-code output and the L2-code output provide phase independent pseudo-random spreading code signals from the single pseudo-random spreading code generator.
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4. An improved navigation receiver having an antenna, a downconverter and an intermediate frequency processor for receiving a coarse/acquisition and a precision spreading code on a first L-band microwave carrier frequency (L1) and for receiving said precision spreading code on a second L-band microwave carrier frequency (L2), an L1-carrier local oscillator and mixer for removing the carrier from the L1 baseband signals, an L2-carrier local oscillator and mixer for removing the carrier from the L2 baseband signals, a coarse/acquisition code mixer and correlator, an L1 precision code mixer and correlator, an L2 precision code mixer and correlator, the improvement comprising a code generator connected to each of the three code mixers comprising:
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an L1-code oscillator having a clock input connected to receive a sample clock signal and a control signal; an L2-code oscillator having a clock input connected to receive said sample clock signal and said control signal; a pseudo-random spreading code generator connected to receive said output of the L1-code oscillator and having an output providing for a first spreading code signal for said L1 precision code mixer and correlator; and a phase resolver connected to control the length of a shift register connected to the pseudo-random spreading code generator and having a pair of inputs connected to receive outputs from the L1-code and L2-code oscillators and said control signal, wherein any excess of L1 code clocks over the L2 code clocks, or vice versa, are used to adjust the length of said shift register and to produce a second spreading code signal for said L2 precision code mixer and correlator.
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5. A method for generating independent L1-code and L2-code signals from a single pseudo-random spreading code generator, comprising the steps of:
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generating L1-code clocks and L2-code clocks from separate oscillators having a common sample clock input; phase resolving said L1-code clocks and L2-code clocks from said separate oscillators to count the excess L1-code clocks over the L2-code clocks; fixing the delay of an L1 pseudo-random spreading code output; and adjusting the delay of an L2 pseudo-random spreading code output to incrementally precede or follow said L1 pseudo-random spreading code output according to said count of excess L1-code clocks over the L2-code clocks. - View Dependent Claims (6, 7, 8, 9)
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10. A method for generating independent L1-code and L2-code signals from a single pseudo-random spreading code generator, comprising the steps of:
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generating L1-code clocks and L2-code clocks from separate oscillators having a common sample clock input and both being initialized by the same reset signal; phase resolving said L1-code clocks and L2-code clocks from said separate oscillators to count the excess L1-code clocks over the L2-code clocks; fixing the delay of an L1 pseudo-random spreading code output; adjusting the delay of an L2 pseudo-random spreading code output to incrementally precede or follow said L1 pseudo-random spreading code output according to said count of excess L1-code clocks over the L2-code clocks; wherein, the step of adjusting is done in increments of pseudo-random spreading code clocks by a connection of a shift register to receive said L1-code clocks; wherein, the step of adjusting is done in increments of sample clocks by a connection of a shift register to receive clocks at least approximately 20.00 MHz; and wherein, the step of phase resolving includes counting the excess L1-code clocks over the L2-code clocks with a multiple-bit binary counter connected to select one-of-a-plurality of inputs from a serial shift register provided to support the step of adjusting the delay of an L2 pseudo-random spreading code output; and providing additional correlation points in an autocorrelation function for reducing the effects of multipath interference.
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Specification