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Semiconductor memory device

  • US 5,724,366 A
  • Filed: 10/30/1996
  • Issued: 03/03/1998
  • Est. Priority Date: 05/16/1995
  • Status: Expired due to Fees
First Claim
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1. A semiconductor device for writing and reading plural data in plural memory cells which are specified by the same address signal through a plurality of pairs of input and output wires, comprising:

  • a plurality of terminals,a plurality of write means connected to said plurality of terminals respectively for writing write data in said plural of memory cells through said plurality of pairs of input and output wires,a plurality of read means for reading data from said plural memory cells through said plurality of pairs of input and output wires,a plurality of output means connected between said plurality of terminals and said plurality of read means respectively, for outputting a plurality of read data read out by said plurality of read means to said plurality of terminals,a mode setting means for outputting test mode signal,degenerating means for generating a first signal indicating that said read data connected to the said degenerating means are all at the first state, for generating a second signal indicating that said read data connected to the said degenerating means are all at the second state, for generating a third signal indicating that said read data connected to said degenerating means include read data at the first state and the second state,comparative means connected to said degenerating means and a terminal which is one of said plurality of terminals, for comparing the output of said degenerating means with the expected data from said terminal,test result outputting means generating a fourth signal by checking said third signal of said degenerating means and the result of comparison of said comparative means, responsive to said test mode signal of said mode setting means.

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