Method and apparatus for managing active power consumption in a microprocessor controlled storage device
First Claim
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1. A flash electrically-erasable programmable read only memory (EEPROM) device comprising:
- a flash EEPROM array;
a memory which stores indications of power modes in which the flash EEPROM device can be read from or written to;
a configuration register which stores a power mode configuration value, provided by a host processor, which corresponds to one of the power mode indications stored in the memory; and
a microprocessor, responsive to commands from the host processor, for reading the configuration register and for controlling operations related to the flash EEPROM array in accordance with the power mode configuration value.
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Abstract
A flash electrically-erasable programmable read only memory (EEPROM) array and a method for allowing a host computer to detect a plurality of different power-expending modes into which a storage device may be placed for operation, to select a particular one of those modes to match the power abilities of the host computer, and then to place the storage device in the proper power mode of operation to best function with the host system.
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Citations
23 Claims
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1. A flash electrically-erasable programmable read only memory (EEPROM) device comprising:
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a flash EEPROM array; a memory which stores indications of power modes in which the flash EEPROM device can be read from or written to; a configuration register which stores a power mode configuration value, provided by a host processor, which corresponds to one of the power mode indications stored in the memory; and a microprocessor, responsive to commands from the host processor, for reading the configuration register and for controlling operations related to the flash EEPROM array in accordance with the power mode configuration value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A microprocessor controlled storage device comprising:
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memory array means; microprocessor means, external to the memory array means, for controlling operations related to the memory array means; means for storing indications of power modes in which the storage device can be read from or written to; means for detecting indications, from a host processor, of power modes available; means for setting a power mode configuration which corresponds to one of the power mode indications stored in the means for storing; and means for responding to a set power mode configuration and for reducing power use of individual components of the storage device in accordance with the set power mode configuration. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A computer system comprising:
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a central processing unit; a system bus; main memory; and a flash electrically-erasable programmable read only memory (EEPROM) device comprising; a flash EEPROM array, a memory which stores indications of power modes in which the flash EEPROM device can be read from or written to, a configuration register which stores a power mode configuration value, provided by the central processing unit, which corresponds to one of the power mode indications stored in the memory, and a microprocessor, responsive to commands from the central processing unit, for reading the configuration register and for controlling operations related to the flash EEPROM array in accordance with the power mode configuration value. - View Dependent Claims (16, 17, 18, 19)
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20. A method of managing power in a microprocessor controlled storage device, the method comprising the steps of:
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(a) identifying a plurality of operating power modes in which the storage device can be read from or written to; (b) selecting an operating power mode from the plurality of operating power modes; (c) storing, responsive to a host processor, an indication of the selected operating power mode; and (d) reducing power use of individual components of the storage device in accordance with the selected operating power mode, such that the storage device may still be read from and written to. - View Dependent Claims (21, 22, 23)
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Specification