Method for manufacturing accelerometer sensor

• US 5,725,785 A
• Filed: 02/21/1996
• Issued: 03/10/1998
• Est. Priority Date: 02/23/1995
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Tokai RIKA Denki Seisakusho
• Original Assignee: Kabushiki Kaisha Tokai RIKA Denki Seisakusho
• Inventors: Ishida, Tatsuya, Watanabe, Akihiko
• Primary Examiner(s): POWELL, WILLIAM A
• Application Number:
  US08/604,720
• Time in Patent Office: 748 Days
• Field of Search: 156/628.1, 156/647.1, 156/657.1, 156/659.11, 156/662.1, 216/2, 216/62, 216/87, 437/228 SFN, 437/927, 73/518
• US Class Current: 216/2
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/123 by piezo-resistive elements, e.g. semiconductor strain gauges
• CPC Class Codes: G01P 15/18 in two or more dimensions
• CPC Class Codes: G01P 2015/084 the mass being suspended at more than one of its sides, e.g. membrane-type suspension, so as to permit multi-axis movement of the mass

Abstract

A method of manufacturing an accelerometer sensor having a mass portion is disclosed. A P-type silicon area is formed in an upper area of a P-type silicon substrate by means of impurity doping. An N-type silicon layer is formed on the silicon substrate through vapor phase epitaxy. A recess defining the mass portion is formed in the silicon substrate through an etching process. A current is supplied to the silicon substrate in an electrolytic solution, such as HF aq., while the substrate is connected to an anode of a power supply. The P-type silicon area is then converted to a porous silicon area. The porous silicon area is subjected to a wet etching to be hollowed, thus obtaining a mass portion of a desired shape.

Claims

1. A method of manufacturing an accelerometer sensor, said sensor comprising a silicon substrate;

an epitaxial layer deposited on said substrate;

a strain gauge provided in said epitaxial layer; and

a mass portion joining with said epitaxial layer and located in an opening formed in said substrate, said method comprising the steps of;

forming a first P-type silicon area in a part of an upper area of a substrate made of P-type single crystal silicon, by means of impurity doping;

forming an epitaxial layer, made of N-type single crystal silicon, on a side of said silicon substrate, so that said first P-type silicon area is located between said silicon substrate and said epitaxial layer;

forming a second P-type silicon area in a part of said epitaxial layer by means of impurity doping, said first and second P-type silicon areas for use in the formation of an inner space in the sensor;

forming a strain gauge in a part of said epitaxial layer;

forming a resist over said epitaxial layer;

subjecting a composite of said silicon substrate and said epitaxial layer to an anodization in which said silicon substrate is used as an anode, thereby to convert said first and second P-type silicon areas to a porous silicon area;

providing a wiring pattern connected to said strain gauge;

forming a mask with an opening necessary for forming a mass portion on a lower surface of said silicon substrate; and

applying an etching through the opening of said mask to said porous silicon area as well as said silicon substrate, thereby forming a mass portion joining with said epitaxial layer and located in an opening formed in said substrate.

2. The method according to claim 1, wherein said etching step comprises the steps of:

forming a recess which defines said mass portion in said silicon substrate by subjecting said silicon substrate to a crystal anisotropic etching through the opening of said mask; and

hollowing said porous silicon area by means of a wet etching of said porous silicon area through said recess.

3. The method according to claim 1, wherein said etching step comprises the steps of:

forming a recess which defines said mass portion in said silicon substrate by subjecting said silicon substrate to an ion etching through the opening of said mask; and

hollowing said porous silicon area by means of a wet etching of said porous silicon area through said recess.

4. A method of manufacturing an accelerometer sensor, said sensor comprising a silicone substrate;

an epitaxial layer deposited on said substrate;

a strain gauge provided in said epitaxial layer; and

a mass portion joining with said epitaxial layer and located in an opening formed in said substrate, said method comprising the steps of;

forming a P-type silicon area in a part of an upper area of a substrate made of P-type single crystal silicon, by means of impurity doping;

forming an epitaxial layer, made of N-type single crystal silicon, on a side of said silicon substrate, so that said P-type silicon area is located between said silicon substrate and said epitaxial layer;

forming a strain gauge, made of P-type silicon, in a part of said epitaxial layer;

providing a wiring pattern connected to said strain gauge;

forming a mask with an opening necessary for forming a mass portion on a lower surface of said silicon substrate;

forming a recess which defines a mass portion in said silicon substrate by subjecting said silicon substrate to an etching through the opening of said mask;

subjecting said silicon substrate to an anodization in which said silicon substrate is used as an anode, thereby to convert said P-type silicon area to a porous silicon area; and

hollowing said porous silicon area by means of a wet etching of said porous silicon area.

5. A method of manufacturing an accelerometer sensor comprising a mass portion, said method comprising the steps of:

providing a first silicon layer serving as a substrate;

forming a P-type silicon area in an upper area of said first silicon layer, by means of impurity doping;

forming a second silicon layer on said first silicon layer through vapor phase epitaxy, so that said P-type silicon area is located between said first and second silicon layers;

forming a recess which defines a mass portion in said first silicon layer;

supplying a current to said first and second silicon layers in an electrolytic solution while one of said first and second silicon layers is connected to an anode of a power supply, thereby converting said P-type silicon area to a porous silicon area; and

hollowing said porous silicon area by means of a wet etching of said porous silicon area.

6. The method according to claim 5, wherein at said current supplying step a temperature of said electrolytic solution is in the range of 10 to 70 degrees Celsius, the current is in the range of 1 to 100 mA/cm².