Thermally enhanced flip chip package and method of forming

• US 5,726,079 A
• Filed: 09/17/1996
• Issued: 03/10/1998
• Est. Priority Date: 06/19/1996
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Johnson, Eric Arthur
• Primary Examiner(s): PICARDAT, KEVIN M
• Application Number:
  US08/715,212
• Time in Patent Office: 539 Days
• Field of Search: 437/209, 437/211, 437/214, 437/215, 437/217, 437/218, 437/219, 437/402
• US Class Current: 438/106
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 Encapsulation

Abstract

A thermally conductive planar member is in thermally conductive communication with a flip chip encapsulated within a dielectric material that surrounds portions of the thermally conductive planar member, the flip-chip, and a predefined portion of a substrate member. The present invention provides a flip chip package having pick-and-place capability without the thermal resistance disadvantage of capped chip packages.

Claims

1. A method of forming a flip chip package, comprising:

providing a substrate member having a plurality of electrical contacts disposed thereon;

providing a flip chip having a plurality of electrical contacts disposed on a lower surface, a planar upper surface, and a plurality of edge surfaces extending between said lower and said upper surfaces;

connecting the electrical contacts of said flip chip with selected ones of the electrical contacts on said substrate;

providing a thermally conductive planar member having a plurality of peripherally disposed edge surfaces;

placing said thermally conductive planar member in thermally conductive communication with said upper surface of the flip chip;

placing said thermally conductive planar member, said flip chip, and said substrate member in a mold cavity wherein a predefined portion of said substrate member cooperates with said mold cavity to define a sealable cavity;

injecting a moldable dielectric material into said sealable cavity;

curing said moldable dielectric material and thereby forming a sealed rigid dielectric covering about the edge surfaces of said thermally conductive planar member, the edge surfaces of said flip chip, and said predefined portion of said substrate member and forming an encapsulated flip chip package comprising said thermally conductive planar member, said flip chip, and said predefined portion of said substrate member; and

removing said flip chip package from said sealed covering.

2. A method of forming a flip chip package, as set forth in claim 1, wherein said mold cavity has a first selected height and said thermally conductive planar member has a thickness selected so that when mounted on the upper planar surface of the flip chip, said planar member extends a second selected height above said substrate member, said second selected height being substantially equal to the first selected height of said mold cavity.

3. A method of forming a flip chip package, as set forth in claim 1, wherein placing said thermally conductive planar member on said upper surface of the flip chip includes bonding said planar member to the upper surface of the flip chip with a thermally conductive adhesive material.