Method of manufacturing a semiconductor device having a buried insulated gate

• US 5,726,088 A
• Filed: 11/15/1996
• Issued: 03/10/1998
• Est. Priority Date: 09/29/1994
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation), Toshiba Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Yanagiya, Satoshi, Matsuda, Noboru, Baba, Yoshiro
• Primary Examiner(s): Trinh, Michael
• Application Number:
  US08/746,846
• Time in Patent Office: 480 Days
• Field of Search: 438/270, 438/268, 438/272, 438/435, 438/287, 438/589, 438/591, 148/DIG. 126
• US Class Current: 438/270
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

In a vertical power MOSFET having a U-shaped trench gate and a method of manufacturing the same, a P-type base layer and an N⁺ -type emitter layer are formed on the surface of an N-type semiconductor substrate. A plurality of trenches are formed to such a depth as to reach the semiconductor substrate. After that, an oxide film and a nitride film are formed in this order on the surface of the resultant element and on the inner surfaces of the trenches. In this case, the oxide film and nitride film are each formed to have a thickness corresponding to the operating characteristics of the element at the stage of design. The nitride film of a gate wiring region is selectively removed to form an oxide film on the surface of the element. Consequently, a thick gate insulation film of the oxide films can be formed between the corner portions of the N⁺ -type emitter layer and a gate electrode wiring layer of the gate wiring region which is to be formed afterward, and the gate-to-source breakdown voltage can be enhanced.

Claims

1. A method of manufacturing a semiconductor device, comprising the steps of:

providing a first semiconductor layer of a second conductivity type on a surface of a semiconductor substrate of a first conductivity type;

providing a second semiconductor layer of the first conductivity type on said first semiconductor layer;

forming a plurality of first trenches through said second semiconductor layer and said first semiconductor layer to such a depth as to reach said semiconductor substrate, and then a second trench for connecting said plurality of first trenches to one another;

depositing a first oxide film on a surface of said semiconductor layer as well as on inner surfaces of said plurality of first trenches and said second trench;

depositing a nitride film on said first oxide film;

selectively removing said nitride film to expose said first oxide film formed along the inner surface of said second trench;

growing a second oxide film on said nitride film and said first oxide film;

depositing an electrode material in said first and second trenches, with said second oxide film interposed therebetween; and

removing part of said electrode material to leave the electrode material only in said plurality of first trenches and leave the electrode material both in and on said second trench.

2. A method of manufacturing a semiconductor device, comprising the steps of:

providing a first semiconductor layer of a second conductivity type on a surface of a semiconductor substrate of a first conductivity type;

providing a second semiconductor layer of the first conductivity type on said first semiconductor layer;

forming a plurality of first trenches through said second semiconductor layer and said first semiconductor layer to such a depth as to reach said semiconductor substrate, and then a second trench for connecting said plurality of first trenches to one another;

depositing a first oxide film on a surface of said semiconductor layer as well as on inner surfaces of said plurality of first trenches and said second trench;

depositing a nitride film on said first oxide film;

depositing an electrode material on said nitride film to fill said first and second trenches;

removing part of the electrode material to leave the electrode material only in said first and second trenches;

selectively removing the nitride film formed along said second trench to expose said first oxide film;

growing a second oxide film on said first oxide film exposed from said nitride film; and

forming a wiring layer along said second trench, with said first and second oxide films interposed therebetween.