Voltage regulator for regulating an output voltage from a charge pump and method therefor
First Claim
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1. A voltage regulator for regulating an output of a boosted voltage from a charge pump to be supplied to a memory circuit, said regulator comprising:
- circuitry for sensing said boosted voltage;
circuitry, coupled to said sensing circuitry, for setting said boosted voltage to one of a plurality of operating states; and
circuitry, coupled to said setting circuitry, for controlling an operation of said charge pump during said one of said plurality of operating states.
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Abstract
An SRAM memory cell (10) is provided a boosted voltage by a charge pump (56) to reduce the soft error rate within the SRAM (10) and to improve bit cell stability. A voltage regulator (58) is coupled to the charge pump (56) to regulate the operation of the charge pump (56) and its outputted boosted voltage. The voltage regulator (58) regulates the boosted voltage over three operating states: low supply voltage, steady state operation, and burn-in.
221 Citations
23 Claims
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1. A voltage regulator for regulating an output of a boosted voltage from a charge pump to be supplied to a memory circuit, said regulator comprising:
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circuitry for sensing said boosted voltage; circuitry, coupled to said sensing circuitry, for setting said boosted voltage to one of a plurality of operating states; and circuitry, coupled to said setting circuitry, for controlling an operation of said charge pump during said one of said plurality of operating states. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method for providing a boosted voltage to semiconductor circuitry, said method comprising the steps of:
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monitoring a supply voltage provided to said semiconductor circuitry; sensing said boosted voltage; and adjusting said boosted voltage in response to a change in said supply voltage. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
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20. An integrated circuit comprising:
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a memory circuit; a terminal for receiving a supply voltage at a first potential level, said terminal coupled to said memory circuit; a charge pump coupled to said memory circuit for providing a voltage potential at a second potential level; and a regulator circuit for regulating an output of said voltage potential from said charge pump, wherein said regulator circuit further comprises; circuitry for monitoring said first potential level; circuitry for monitoring said second potential level; and circuitry for adjusting said second potential level in response to said first potential level. - View Dependent Claims (21, 22, 23)
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Specification