Digital modem
First Claim
1. A digital modulator-demodulator comprising:
- a detector means operative in synchronism with a first operation clock for a digital detection of a received signal;
a modulator means operative in synchronism with a second operation clock for modulating a digital transmission data;
a first clock generating means for generating the first operation clock; and
a second clock generating means for generating the second operation clock, wherein at least one of the first and second clock generating means comprises;
a frequency divider means for frequency-dividing a reference clock to provide a third clock;
a phase synchronizing means for generating a fourth clock phase-synchronised with the reference clock; and
a switch means for alternatively selecting one of the third and fourth clocks to provide a corresponding one of the first and second operation clocks.
1 Assignment
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Accused Products
Abstract
A modem LSI includes a combination of a first frequency divider, a first PLL circuit composed of a phase comparator, an LPF and a VCO, and a first select switch for selecting one of the first frequency divider and the first PLL circuit to provide a detection clock for a detector and a combination of a second frequency divider, a second PLL circuit composed of a phase comparator, an LPF and a VCO, and a second select switch for selecting one of the second frequency divider and the second PLL circuit to provide an operation clock for a roll-off wave generator and a clock regenerator, the first and second frequency dividers and the first and second PLL circuits each receiving a reference clock from a common oscillator installed outside the LSI.
34 Citations
5 Claims
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1. A digital modulator-demodulator comprising:
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a detector means operative in synchronism with a first operation clock for a digital detection of a received signal; a modulator means operative in synchronism with a second operation clock for modulating a digital transmission data; a first clock generating means for generating the first operation clock; and a second clock generating means for generating the second operation clock, wherein at least one of the first and second clock generating means comprises; a frequency divider means for frequency-dividing a reference clock to provide a third clock; a phase synchronizing means for generating a fourth clock phase-synchronised with the reference clock; and a switch means for alternatively selecting one of the third and fourth clocks to provide a corresponding one of the first and second operation clocks. - View Dependent Claims (2, 3, 4, 5)
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Specification