User defined port and protocol scheme for a programmable logic controller

• US 5,727,170 A
• Filed: 12/29/1994
• Issued: 03/10/1998
• Est. Priority Date: 12/29/1994
• Status: Expired due to Term

• Current Assignee: Siemens Industry Incorporated (Siemens AG)
• Original Assignee: Siemens Energy & Automation Incorporated (Siemens AG)
• Inventors: Fulton, Temple L., Mitchell, Ronald
• Primary Examiner(s): Harvey, Jack B.
• Assistant Examiner(s): PHAN, RAYMOND NGAN
• Application Number:
  US08/365,646
• Time in Patent Office: 1,167 Days
• Field of Search: 395/280, 395/281, 395/297, 395/375, 395/309, 395/310, 395/284, 395/285, 395/286, 395/892, 395/652, 395/653, 395/830, 395/831, 395/833, 395/834, 395/856, 395/858, 395/862, 395/882, 395/883, 395/893
• US Class Current: 710/105
• CPC Class Codes: G05B 19/05 Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
• CPC Class Codes: G05B 2219/15028 Controller and device have several formats and protocols, select common one

Abstract

The PLC has a user configurable protocol port attached thereto. Briefly stated, at the PLC communication port or as a result of a user program or I/O event, a special flag bit may be set which thereby allows the communication port to be activated. This is done by the flag bit causing an interrupt to occur in the PLC user program which allows a user to communicate with a user specified protocol scheme rather than the normal communication/programming protocol when this special bit is not set.

Claims

1. A programmable logic controller, operable to communicate with external hardware under one of a plurality of predefined communication protocols different from resident communication protocols of said programmable logic controller, said controller comprising:

a communications port responsive to a predetermined condition for switching between a first mode of communications for communicating between the programmable logic controller and the external hardware using one of the plurality of communication protocols, and a second mode of communications for communicating between the programmable logic controller and a programming device using one of the resident communication protocols;

a memory for storing a resident program said memory being configurable with one of the plurality of communication protocols;

a removable memory cartridge for at least one of i) uploading the resident program from the memory to the removable memory cartridge and ii) downloading the resident program to the memory from the removable memory cartridge, the program being configurable with one of the plurality of communication protocols;

processing means, coupled to the memory and coupled to the communications port, for executing the resident program for transferring a plurality of data values between said programmable logic controller and said external hardware, and for detecting the predetermined condition and causing the communications port to switch from the second mode to the first mode of communications;

input means for receiving input data values of the plurality of data values from said external hardware, said input means being coupled to said processing means; and

,

output means for transmitting output data values of the plurality of data values to said external hardware, said output means being coupled to said processing means.

2. The programmable logic controller of claim 1, wherein said memory configurable with said one of a plurality of predefined communication protocols is electrically erasable programmable read only memory (EEPROM).

3. The programmable logic controller according to claim 1, wherein said predetermined condition is initiated by at least one of said resident program, by a predetermined input event through said input means, and by a predetermined output event through said output means.

4. The programmable logic controller according to claim 1, wherein said predetermined condition is caused by an interrupt routine to store said one of a plurality of predefined communications protocols in said memory.

5. The programmable logic controller according to claim 1, wherein said one of a plurality of predefined communication protocols includes one of single character messages and multi-character messages.

6. The programmable logic controller according to claim 1, wherein said communications port is normally operable to interconnect a plurality of said programmable logic controllers for communication under said resident communication protocols.

7. The programmable logic controller according to claim 4, wherein said interrupt routine is initiated by a special flag bit being transmitted to said programmable logic controller.

8. A method for operating a communications port of a programmable logic controller utilizing a resident protocol for internal processing to communicate under one of a plurality of predefined communication protocols, different from the resident protocol, which predefined communications protocols are used by external hardware, said method comprising the steps of:

alerting said programmable logic controller to switch the communications port between a first mode of communications for communicating between the programmable logic controller and the external hardware using one of the plurality of predefined communications protocols and a second mode of communications for communicating between the programmable logic controller and a programming device using the resident communications protocol;

configuring an operating program stored in said programmable logic controller to use said one of a plurality of predefined communications protocols and the resident communications protocol;

uploading said operating program from said programmable logic controller to a removable memory cartridge in response to a first command from said programmable logic controller;

downloading said operating program from said removable memory cartridge to said programmable logic controller in response to a second command from said programmable logic controller; and

,

executing communications by said operating program with said external hardware under said one of a plurality of predefined communications protocols while said programmable logic controller is still under the alert of said change in communications protocols.

9. The method of claim 8, wherein the step of said alerting is accomplished by setting a special flag bit to a predetermined state to activate a predetermined port to said programmable logic controller to permit said specifying said one of a plurality of predefined communication protocols.

10. The method of claim 8, wherein said special flag bit being set to said predetermined state causes an interrupt to occur in said operating program allowing said specifying said one of a plurality of predefined communications protocols.

11. The method of claim 8, wherein said predetermined port is a communications port.

12. The method of claim 8, wherein said one of a plurality of predefined communication protocols includes one of single character messages and multi-character messages.

13. The method of claim 8, wherein said specifying includes copying said one of a plurality of predefined communication protocols into memory responsive to said operating program.

14. The method of claim 13, wherein said one of a plurality of predefined communication protocols is copied or to an electrically erasable programmable read only memory (EEPROM).