Semiconductor device having a metal film formed in a groove in an insulating film

• US 5,731,634 A
• Filed: 06/06/1996
• Issued: 03/24/1998
• Est. Priority Date: 07/31/1992
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation), Toshiba Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Matsuo, Mie, Suguro, Kyoichi, Hayasaka, Nobuo, Miyajima, Hideshi, Wada, Jun-ichi, Okano, Haruo
• Primary Examiner(s): Saadat, Mahshid D.
• Assistant Examiner(s): ARROYO, TERESA M
• Application Number:
  US08/659,389
• Time in Patent Office: 656 Days
• Field of Search: 257/751, 257/752, 257/761, 257/762, 257/763
• US Class Current: 257/752
• CPC Class Codes: H01L 21/28518 the conductive layers comprising silicides H01L21/28537 takes precedence
• CPC Class Codes: H01L 21/76823 transforming an insulating layer into a conductive layer
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 23/5283 Cross-sectional geometry
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present invention provides a method of manufacturing a semiconductor device, including the steps of forming a metal oxide film made of a metal oxide having a decrease in standard free energy smaller than a decrease in standard free energy of hydrogen oxide or of carbon oxide, on an insulating film formed on a semiconductor substrate, forming a metal oxide film pattern by subjecting a treatment to the metal oxide film, and converting said metal oxide pattern into at least one of an electrode and a wiring made of a metal which is a main component constituting the metal oxide, by reducing the metal oxide film pattern at a temperature of 80° to 500° C.

Claims

1. A semiconductor device comprising:

an insulating film formed on a substrate and having a groove;

a first film formed on a side surface and a bottom surface in said groove;

a wiring layer formed on said first film; and

a second film formed on an upper surface of said wiring layer,

wherein θ

satisfies a condition 0<

θ

<

90°

, wherein θ

represents an angle between said side surface of said first film and a tangent line of said upper surface at a contact point between said upper surface of said wiring layer and said side surface of said first film.

2. The device according to claim 1, wherein θ

and θ

'"'"' satisfy the condition θ

<

θ

'"'"', wherein θ

'"'"' represents an angle between said upper surface and a tangent line at the vertex of said upper surface.

3. The device according to claim 1, wherein an edge portion of said upper surface close to said contact point in section includes a curvature portion.

4. The device according to claim 1, wherein said first film is made of a material selected from the group consisting of Ti, Nb, W, Mo, Cr, V, Ta, Zr, Hf, and nitrides thereof.

5. The device according to claim 1, wherein said second film is made of a material selected from the group consisting of Ti, Nb, W, Mo, Cr, V, Ta, Zr, Hf, and nitrides thereof.

6. The device according to claim 1, wherein said wiring layer is made of Cu and Ag.

7. A semiconductor device comprising:

insulating film formed on a substrate and having a groove;

a first film, containing a metal, formed on a side surface and a bottom surface in said groove;

an oxide film made of an oxide of said metal formed at crystal boundary of said metal;

a wiring layer formed on said first film.

8. The device according to claim 7, wherein an edge portion of said upper surface close to a contact point between said upper surface of said wiring layer and said side surface of said first film in section includes a curvature portion.

9. The device according to claim 7, wherein said first film is made of a material selected from the group consisting of Ti, Nb, W, Mo, Cr, V, Ta, Zr, Hf, and nitrides thereof.

10. The device according to claim 7, wherein said wiring layer is made of Cu and Ag.

11. The device according to claim 7, further comprising a second film formed on an upper surface of said wiring layer.

12. The device according to claim 11, wherein said second film is made of a material selected from the group consisting of Ti, Nb, W, Mo, Cr, V, Ta, Zr, Hf, and nitrides thereof.

13. The device according to claim 7, wherein θ

satisfies a condition 0<

θ

<

90°

, wherein θ

represents an angle between said side surface of said first film and a tangent line of said upper surface at a contact point between said upper surface of said wiring layer and said side surface of said first film.

14. A device according to claim 7, wherein θ

and θ

'"'"' satisfy a condition θ

<

θ

'"'"', wherein θ

'"'"' represents an angle between said upper surface and a tangent line at the vertex of said upper surface.