Semiconductor device, active-matrix substrate and method for fabricating the same

• US 5,734,177 A
• Filed: 09/20/1996
• Issued: 03/31/1998
• Est. Priority Date: 10/31/1995
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Sakamoto, Hiromi
• Primary Examiner(s): WOJCIECHOWICZ, EDWARD JOSEPH
• Application Number:
  US08/717,463
• Time in Patent Office: 557 Days
• Field of Search: 257/49, 257/88, 257/98, 257/99, 257/368, 257/390, 257/750, 257/758, 257/773, 257/296, 349/46, 349/47, 349/38, 438/40, 438/48, 438/181
• US Class Current: 257/49
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors

Abstract

A semiconductor device formed on an insulating substrate of the present invention includes: a gate wiring provided on the insulating substrate; a first insulating film provided so as to cover the gate wiring; an upper electrode formed so as to face the gate wiring in such a manner that the first insulating film is interposed therebetween; a second insulating film provided so as to cover the upper electrode; and another electrode formed on the second insulating film, wherein the upper electrode is electrically connected to the another electrode via a contact hole formed through the second insulating film, a storage capacitor is formed of a structure including the upper electrode, the first insulating film, and the gate wiring opposing the upper electrode through the first insulating film, the upper electrode and the gate wiring have substantially the same width.

Claims

1. A semiconductor device formed on an insulating substrate, comprising:

a gate wiring provided on the insulating substrate;

a first insulating film provided so as to cover the gate wiring;

an upper electrode formed so as to face the gate wiring in such a manner that the first insulating film is interposed therebetween;

a second insulating film provided so as to cover the upper electrode; and

another electrode formed on the second insulating film,

wherein the upper electrode is electrically connected to the another electrode via a contact hole formed through the second insulating film,

a storage capacitor is formed of a structure including the upper electrode, the first insulating film, and the gate wiring opposing the upper electrode across the first insulating film,

the upper electrode and the gate wiring have substantially the same width.

2. A semiconductor device according to claim 1, wherein the insulating substrate, the upper electrode and the first insulating film are transparent.

3. A semiconductor device according to claim 2, wherein the upper electrode is patterned by exposure from a bottom face of the substrate using the gate wiring as a mask.

4. A semiconductor device according to claim 1, wherein the first insulating film has a thickness in the range of about 50 to about 200 nm.

5. A semiconductor device according to claim 1, wherein the first insulating film has a thickness in the range of about 50 to about 300 nm.

6. A semiconductor device according to claim 1, wherein a metal material for forming the gate wiring has a specific resistance of 10 μ

Ω

cm or less.

7. A semiconductor device according to claim 1, wherein the gate wiring is made of a metal material containing Al as a main component.

8. A semiconductor device according to claim 7, wherein the metal material containing Al as a main component contains at least one of Ti, Dy, Nd, Fe, Co and Gd.

9. A semiconductor device according to claim 1, wherein the first insulating film includes a film formed by anodizing a surface of the gate wiring.

10. An active matrix substrate comprising:

an insulating substrate;

a gate wiring provided on the insulating substrate;

a source wiring intersecting the gate wiring;

a pixel electrode for applying a voltage to a display medium, provided in the vicinity of an intersecting point of the gate wiring and the source wiring;

a switching element electrically connected to the pixel electrode;

a first insulating film provided so as to cover the gate wiring;

an upper electrode formed so as to face the gate wiring in such a manner that the first insulating film is interposed therebetween; and

a second insulating film formed so as to cover the upper electrode,

wherein the upper electrode is electrically connected to the pixel electrode via a contact hole formed through the second insulating film,

a storage capacitor for holding a voltage to be applied to the display medium is formed of a structure including the upper electrode, the first insulating film and the gate wiring opposing the upper electrode across the first insulating film, and

the upper electrode and the gate wiring have substantially the same width.

11. An active-matrix substrate according to claim 10, wherein the first insulating film has a thickness in the range of about 50 nm to about 200 nm.

12. An active-matrix substrate according to claim 10, wherein the first insulating film has a thickness in the range of about 50 nm to about 300 nm.

13. An active-matrix substrate according to claim 10, wherein a metal material for forming the gate wiring has a specific resistance of 10 μ

Ω

cm or less.

14. An active-matrix substrate according to claim 10, wherein the gate wiring is made of a metal material containing Al as a main component.

15. An active-matrix substrate according to claim 14, wherein the metal material containing Al as a main component contains at least one of Ti, Dy, Nd, Fe, Co and Gd.

16. An active-matrix substrate according to claim 14, wherein the first insulating film includes a film formed by anodizing the surface of the gate wiring.

17. An active-matrix substrate comprising:

an insulating substrate;

a first gate wiring and a second gate wiring provided on the insulating substrate;

a source wiring intersecting the first gate wiring and the second gate wiring;

a pixel electrode for applying a voltage to a display medium, provided in the vicinity of an intersecting point of the first gate wiring and the source wiring between the first gate wiring and the second gate wiring;

a switching element including a gate electrode connected to the first gate wiring, a source electrode connected to the source wiring, and a drain electrode electrically connected to the pixel electrode;

a first insulating film provided so as to cover the second gate wiring;

an upper electrode formed so as to face the second gate wiring in such a manner that the first insulating film is interposed therebetween; and

a second insulating film provided so as to cover the upper electrode,

wherein the upper electrode is electrically connected to the pixel electrode via a contact hole formed through the second insulating film,

a storage capacitor for holding a voltage to be applied to the display medium is formed of a structure including the upper electrode, the first insulating film and the second gate wiring opposing the upper electrode across the first insulating film, and

the upper electrode and the second gate wiring have substantially the same width.

18. A method for fabricating an active-matrix substrate including:

a transparent insulating substrate;

a gate wiring provided on the transparent insulating substrate;

a source wiring intersecting the gate wiring;

a pixel electrode for applying a voltage to a display medium, provided in the vicinity of an intersecting point of the gate wiring and the source wiring; and

a switching element electrically connected to the pixel electrode,

the method comprising the steps of;

forming a first transparent film so as to cover the gate wiring;

forming a transparent conductive film so as to cover the first transparent insulating film;

patterning the transparent conductive film in a self-aligned manner with the gate wiring by photolithography using the gate wiring as a mask, thereby forming an upper electrode so as to face the gate wiring in such a manner that the first transparent insulating film is interposed therebetween;

forming a second insulating film having a contact hole formed therethrough so as to cover the upper electrode; and

forming the pixel electrode, which is electrically connected to the upper electrode via the contact hole formed through the second insulating film, on the second insulating film,

wherein a storage capacitor for holding a voltage to be applied to the display medium is formed of a structure including the upper electrode, the first transparent insulating film and the gate wiring opposing the upper electrode through the first transparent insulating film.

19. A method for forming an active-matrix substrate according to claim 18, wherein the first transparent film is formed by anodizing a surface of the gate wiring.

20. A method for forming an active-matrix substrate according to claim 18, wherein the first transparent film is formed so as to have a thickness in the range of about 50 nm to about 200 nm.

21. A method for forming an active-matrix substrate according to claim 18, wherein the first transparent film is formed so as to have a thickness in the range of about 50 nm to about 300 nm.

22. A method for forming an active-matrix substrate according to claim 18, wherein the gate wiring is made of a metal material containing Al as a main component.

23. A method for forming an active-matrix substrate according to claim 22, wherein the metal material containing Al as a main component contains at least one of Ti, Dy, Nd, Fe, Co and Gd.