Differential stage logic circuit
First Claim
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1. An amplifier stage including at least one MOS load transistor as an adjustable load (Rv), an adjustable bias current source (Iv), and adjusting means (1) for increasing the bias current with an increase of the operating frequency of the amplifier stage and for controlling the load transistor such that the product of the bias current by the resistance of the load transistor is constant, wherein said adjusting means comprise:
- a diode connected MOS transistor (Rc) forming a current mirror with said load transistor;
a plurality of constant control current sources (Ic), selectable independently by respective selection signals (S) for biasing the diode connected transistor; and
a plurality of constant bias current sources (Iv) forming said adjustable bias current source, each constant bias current source being selectable by a respective one of said selection signals for biasing the amplifier stage.
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Abstract
An ECL stage has its current consumption adapted to its operation speed. For this purpose, the load resistor and the bias current source are adjustable so that the product of the current value of the source by the resistor value is substantially constant.
80 Citations
4 Claims
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1. An amplifier stage including at least one MOS load transistor as an adjustable load (Rv), an adjustable bias current source (Iv), and adjusting means (1) for increasing the bias current with an increase of the operating frequency of the amplifier stage and for controlling the load transistor such that the product of the bias current by the resistance of the load transistor is constant, wherein said adjusting means comprise:
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a diode connected MOS transistor (Rc) forming a current mirror with said load transistor; a plurality of constant control current sources (Ic), selectable independently by respective selection signals (S) for biasing the diode connected transistor; and a plurality of constant bias current sources (Iv) forming said adjustable bias current source, each constant bias current source being selectable by a respective one of said selection signals for biasing the amplifier stage. - View Dependent Claims (2, 3, 4)
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Specification