Demodulation of an intermediate frequency signal by a sigma-delta converter

• US 5,734,683 A
• Filed: 03/29/1996
• Issued: 03/31/1998
• Est. Priority Date: 09/10/1993
• Status: Expired due to Term

• Current Assignee: Nokia Mobile Phones UK Limited (Nokia Corporation)
• Original Assignee: Nokia Mobile Phones UK Limited (Nokia Corporation)
• Inventors: Kontas, Veijo L. H., Hulkko, Jaakko A., Siren, Lauri T.
• Primary Examiner(s): TSE, YOUNG TOI
• Application Number:
  US08/624,113
• Time in Patent Office: 732 Days
• Field of Search: 375/240, 375/244, 375/247, 375/316, 375/328-329, 375/332, 341/143
• US Class Current: 375/316
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H03D 3/009 Compensating quadrature phase or amplitude imbalances
• CPC Class Codes: H03D 7/00 Transference of modulation from one carrier to another, e.g. frequency-changing H03D9/00, H03D11/00 take precedence; dielectric amplifiers, magnetic amplifiers, parametric amplifiers used as a frequency-changers H03F
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H03M 3/41 combined with modulation to or demodulation from the carrier
• CPC Class Codes: H03M 3/454 with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Abstract

A sigma-delta signal converter is implemented using switched capacitor switching elements in which a first switch (31) serves as a mixer (11). The output of the mixer is directed to the second input of an adder (16), and its second input is the feedback signal (f1) of the sigma-delta signal converter, which is also directed into a base-frequency output signal through a decimator (14) and low-pass filtering (15).

Claims

1. A receiver for receiving a modulated carrier signal comprising, a sigma-delta signal converter having at least one summing node included in a feedback loop, characterized in that the sigma-delta signal converter comprises a time discrete sampling means located at an input stage of the sigma-delta signal converter controlled by a square wave local oscillator signal for down converting the received modulated carrier signal to a base-band signal, wherein the frequency of the square wave local oscillator signal is equal to one of the carrier signal frequency of the received modulated carrier signal plus an offset frequency Δ

f, where Δ

f is equal to one of a value of zero or a value greater than zero, or a subharmonic of the modulated carrier signal frequency.

2. A receiver according to claim 1 wherein the time discrete sampling means comprises a switching member having an input node coupled to said received modulated carrier signal, and wherein said square wave local oscillator signal is coupled to said switching member for controlling the opening and closing of said switching member.

3. A receiver according to claim 1 wherein the time discrete sampling means comprises switched capacitor switching elements.

4. A receiver as set forth in claim 1, wherein said modulated carrier signal is divided into two signals having a predetermined phase relationship one to another, and wherein said receiver is comprised of first and second sigma-delta signal converters each having an input stage comprised of said time discrete sampling means that is controlled by said square wave local oscillator signal, each of said first and second sigma-delta signal converters being coupled to one of said two signals.

5. A receiver as set forth in claim 1, wherein said receiver is a component part of a radio telephone.

6. A circuit for receiving a modulated radio frequency (RF) carrier signal for down converting the received carrier signal to a base-band signal, the circuit comprising a sigma-delta signal converter circuit comprised of a switched capacitor input stage that is switched with local oscillator signal provided in the form of a non-sinusoidal switching signal having a frequency equal to or approximately equal to one of a frequency of said received carrier signal, or a sub-harmonic of said received carrier signal;

said switched capacitor input stage outputting the base-band signal;

a first summing node having a first input coupled to an output of said input stage;

a first integrator coupled to an output of said first summing node;

a second summing node having a first input coupled to an output of said first integrator;

a second integrator coupled to an output of said second summing node; and

a comparator coupled to an output of said second integrator;

wherein an output of said comparator is coupled back to a second input of each of said first summing node and said second summing node;

said sigma-delta signal converter circuit further comprising a decimator coupled to an output of said comparator and a filter coupled to an output of said decimator.

7. A circuit according to claim 6, characterized in that the local oscillator signal has a frequency given by LO+Δ

f, whereby the modulated carrier signal is folded on an intermediate frequency Δ

f.

8. A circuit according to claim 6, characterized in that said input stage is further comprised of a switched capacitor circuit that is controlled by said local oscillator signal.

9. A circuit according to claim 6, characterized in that said input stage comprises a switched capacitor circuit having at least one capacitor that is switchably coupled in parallel with said switched capacitor circuit for implementing an automatic gain control (AGC) function.

10. A circuit as set forth in claim 6, wherein said modulated carrier signal is divided into two signals having a predetermined phase relationship one to another, and wherein said circuit is comprised of first and second sigma-delta signal converter circuits each having said switched capacitor input stage that is switched with said local oscillator signal, each of said first and second sigma-delta signal converter circuits being coupled to one of said two signals.

11. A circuit as set forth in claim 6, wherein said circuit is a component part of a radio telephone.

12. In a radio telephone, a method for converting a received modulated intermediate frequency (IF) signal to a base-band signal, comprising the steps of:

applying the IF signal to an input stage of a sigma-delta converter circuit, the input stage comprising a switched capacitor circuit;

mixing the IF signal to the base-band signal in the switched capacitor circuit by applying a switch control local oscillator (LO) signal having a frequency equal to one of the frequency of the received modulated IF signal plus or minus an offset frequency Δ

f, where Δ

f is equal to one of a value of zero or a value greater than zero, or a subharmonic of the received modulated IF signal; and

demodulating and converting an output of the switched capacitor circuit to a digital signal by the sigma-delta converter circuit.

13. A method as set forth in claim 12, wherein the step of applying applies the IF signal to input stages of at least two sigma-delta converter circuits, the input stage of each comprising the switched capacitor circuit, wherein the step of mixing occurs in each sigma-delta converter circuit by applying to each input stage the switch control local oscillator (LO) signal, and wherein the LO signals have a predetermined phase relationship one to another.

14. A method as set forth in claim 12, wherein the step of applying includes a preliminary step of bandpass filtering the IF signal.

15. A method as set forth in claim 12, wherein the step of mixing includes a step of varying a signal transfer ratio of the switched capacitor circuit by switchably connecting one or more capacitances in parallel with the switched capacitor circuit.

16. A method as set forth in claim 12, wherein the step of applying the switch control LO signal applies a nominally square wave signal having a period that defines a first phase and a second phase, and wherein the step of mixing includes the steps of sampling the applied IF signal during the first phase, and outputting the sampled IF signal during the second phase.