Add-in board with programmable configuration registers for use in PCI bus computers
First Claim
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1. An add-in board for using in a PCI computer system comprising:
- a first bus;
a sub-assembly means coupled to the first bus;
said sub-assembly means performing predetermined functions to accomplish a desired task;
a microprocessor coupled to the first bus;
a non-volatile storage means coupled to the first bus, said non-volatile storage means storing configuration information;
a Peripheral Component Interconnect (PCI) bus interface chip interconnected to the first bus and a second bus, said PCI bus interface chip including programmable configuration registers accessible by a PCI microprocessor, over the second bus, and the microprocessor; and
a PCI bus interface chip controller responsive to a first signal to inhibit the PCI microprocessor from accessing said configuration registers until the microprocessor pre-loads the configuration information into the said configuration registers.
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Abstract
An adapter or add-in card for using in a peripheral component interconnect (PCI) computer includes a universal module which couples the card to the PCI bus. The module includes a set of selectively programmable configuration registers which are loaded by a microprocessor on the adapter. A circuit arrangement on the module issues a command which inhibits the PCI processor from accessing the configuration registers until fully loaded.
59 Citations
21 Claims
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1. An add-in board for using in a PCI computer system comprising:
- a first bus;
a sub-assembly means coupled to the first bus; said sub-assembly means performing predetermined functions to accomplish a desired task; a microprocessor coupled to the first bus; a non-volatile storage means coupled to the first bus, said non-volatile storage means storing configuration information; a Peripheral Component Interconnect (PCI) bus interface chip interconnected to the first bus and a second bus, said PCI bus interface chip including programmable configuration registers accessible by a PCI microprocessor, over the second bus, and the microprocessor; and a PCI bus interface chip controller responsive to a first signal to inhibit the PCI microprocessor from accessing said configuration registers until the microprocessor pre-loads the configuration information into the said configuration registers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
- a first bus;
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9. In a PCI computer system having a PCI bus to which a PCI processor executing a PCI configuration software is connected and a PCI add-in board is connected to said PCI bus, a method for configuring the PCI add-in board comprising the steps of:
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providing a set of configuration registers and a control register on the PCI add-in board, with the set of configuration registers being accessible by the PCI processor and a local processor located on the add-in board; on receiving a predetermined signal, a controller on the add-in board activates a predetermined set of control signals on the PCI bus which causes the PCI processor to delay accessing the set of configuration registers; using the local processor to download configuration data stored in said processor into the set of configuration registers; upon completing loading of the set of configuration registers, notifying the controller which deactivates the set of control signals which was previously activated, thereby allowing the PCI processor to access the set of configuration registers and configuring said PCI add-in board.
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10. An interface subsystem for coupling add-in boards to the PCI bus of a PCI computer system comprising:
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at least one configuration register for storing configuration data; a control register for storing control information; a PCI bus interface controller being responsive to a first signal to activate selected signals, on the PCI bus, into a first state which inhibits a PCI processor from accessing said at least one configuration register; and a circuit arrangement for monitoring the control register and depending on the state of one or more selected bits in said register outputs a second signal which causes the PCI bus interface controller to deactivate the selected signals, on the PCI bus, into a second state to enable the PCI processor to access the at least one configuration register. - View Dependent Claims (11, 12, 13, 14, 15, 16, 21)
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17. An add-in board for use in a computer system comprising:
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a bus; a task generator coupled to the bus, said task generator including circuitry which performs required functions to accomplish a desired task; a storage including configuration information coupled to the bus; a Peripheral Component Interconnect (PCI) bus interface chip including programmable Configuration Registers; a controller including logic circuit and a register for controlling access to the Configuration Registers; and a microprocessor coupled to the bus, said microprocessor responsive to a signal to load configuration information into the Configuration Registers and activate the controller wherein a processor associated with said computer system is given access to said Configuration Registers to configure the Add-in Board. - View Dependent Claims (18, 19)
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20. In a computer system comprising a processor and an adapter card coupled to the bus of the processor, a method for configuring the adapter card comprising the steps of:
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(a) providing programmable configuration registers, on the adapter card; (b) providing circuitry, on the adapter card, which outputs electrical signals that cause the processor to access or not access the configuration registers; (c) activating the circuitry to generate the electrical signals denying the processor access to said configuration registers; (d) using a processor on the adapter card to load configuration information into said configuration registers; and (e) activating the circuitry to generate electrical signals allowing said processor to access said configuration registers to configure said adapter card.
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Specification