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Hardware reset of a write state machine for flash memory

  • US 5,742,787 A
  • Filed: 04/10/1995
  • Issued: 04/21/1998
  • Est. Priority Date: 04/10/1995
  • Status: Expired due to Fees
First Claim
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1. A method of aborting an automated write sequence in a memory device, the method comprising the steps of:

  • (A) commencing the write sequence upon receipt of a command, wherein the write sequence includes a plurality of operations being performed by a write state machine on a nonvolatile memory array of the memory device;

    (B) detecting an abort signal during each operation of the write sequence, the abort signal capable of being in one of a first and second state;

    (C) halting the write sequence by ramping down a write voltage supplied to the nonvolatile memory array if the write state machine detects the abort signal in the first state, and continuing with the write sequence if the write state machine detects the abort signal in the second state; and

    (D) placing the nonvolatile memory array in a read-only mode if the abort signal is in the first state.

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