M&A for dynamically generating and maintaining frame based polling schedules for polling isochronous and asynchronous functions that guaranty latencies and bandwidths to the isochronous functions

• US 5,742,847 A
• Filed: 10/31/1994
• Issued: 04/21/1998
• Est. Priority Date: 10/31/1994
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Bhatt, Ajay V., Cadambi, Sudarshan Bala, Nizar, Puthiya Kottal, Haslam, Richard M., Morriss, Jeff Charles, Knoll, Shaun
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): DINH, DUNG C
• Application Number:
  US08/331,727
• Time in Patent Office: 1,268 Days
• Field of Search: 395/835, 395/849, 395/850, 395/836, 395/200.17, 395/860, 395/861, 395/864, 395/865, 395/866, 370/60, 370/60.1, 370/85.8, 370/94.2, 370/95.1, 370/95.2
• US Class Current: 710/46
• CPC Class Codes: G06F 13/10 Program control for peripheral devices G06F13/14 - G06F13/42 take precedence
• CPC Class Codes: G06F 13/22 using successive scanning, e.g. polling G06F13/24 takes precedence
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence
• CPC Class Codes: H04L 12/40058 Isochronous transmission
• CPC Class Codes: H04L 12/40065 Bandwidth and channel allocation home automation networks H04L12/2803; flow control H04L47/10

Abstract

Circuitry and complementary logic are provided to a bus controller, a number of 1:n bus signal distributors, and a number of bus interfaces of an hierarchical serial bus assembly for the bus controller to dynamically generate and maintain a frame based polling schedule for polling the functions of the bus agents connected to the serial bus assembly and the serial bus elements themselves. The hierarchical serial bus assembly is used to serially interface a number of isochronous and asynchronous peripherals to the system unit of a computer system. These circuitry and complementary logic of the serial bus elements support gathering of various critical operating characteristics by the bus controller. The circuitry and logic provided to the bus controller in turn generate the frame based polling schedule in accordance to these gathered critical operating characteristics, guaranteeing latencies and bandwidths to the isochronous functions of the isochronous peripherals. In certain embodiments, the circuitry and logic provided to the bus controller further adapts in real time its frame based polling schedule in like manner, responsive to live attachment/detachment of serial bus elements.

Claims

1. An apparatus for generating and maintaining frame based polling schedules that guaranty latencies and bandwidths to isochronous functions of isochronous peripherals coupled to a system unit of a computer system, along with asynchronous peripherals, said apparatus comprising:

first means for conducting a plurality of configuration management transactions between the system unit and the peripherals, isochronous as well as asynchronous, to dynamically determine a plurality of operating characteristics for each of the peripherals, including latency requirement of the isochronous functions and transmit times of isochronous data, as well as transactional requirements of the asynchronous peripherals and transmit times of transactions;

second means for generating and maintaining a polling schedule for the system unit to poll the peripherals, the polling schedule being generated and maintained in accordance with the determined operating characteristics, and consisting of a superframe having a plurality of soft frames that are replications of one or more base frames, wherein polling of each of the isochronous functions is scheduled in multiple ones of the soft frames by virtue of said replications and scheduling polling of the isochronous function in at least one of the one or more base frames, and polling of each of the asynchronous peripherals is scheduled in at most one of the soft frames.

2. The apparatus as set forth in claim 1, wherein said first means comprises:

first circuitry and complementary logic disposed on said system unit for polling said isochronous and said asynchronous peripherals to provide said latency requirements of the isochronous functions and said transmit times of isochronous data, as well as said transactional requirements of the asynchronous peripherals and said transmit times of transactions.

3. The apparatus as set forth in claim 1, wherein said second means comprises:

first circuitry and complementary logic disposed on said system unit for determining an isochronous watermark for a base frame, delimiting a first upper limit within the base frame for scheduling polling of isochronous functions.

4. The apparatus as set forth in claim 3, wherein, said second means further comprises:

second circuitry and complementary logic for scheduling polling of isochronous functions in the base frame, for data communication transactions, subject to a first constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data being less than the isochronous watermark.

5. The apparatus as set forth in claim 4, wherein,

said first circuitry and complementary logic is further used for determining a frame watermark for each of the soft frames for delimiting a second upper limit within each of the soft frames for scheduling polling;

and

said second circuitry and complementary logic is further used for scheduling polling of said isochronous peripherals for connection management transactions, around said scheduled polling of said isochronous functions for data communication transactions, subject to a second constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data and the scheduled isochronous peripherals'"'"' connection management transactions being less than the frame watermark for each soft frame, said second circuitry and complementary logic replicating said one or more base frames to schedule said polling for connection management transactions, if necessary.

6. The apparatus as set forth in claim 3, wherein, said second means further comprises:

second circuitry and complementary logic for determining a least common update rate required by said isochronous functions based on the isochronous functions'"'"' respective update rates required which are computed from said latency requirements, determining a plurality of truncated integer multipliers, one for each isochronous function, based on said least common update rate and said update rates required by said isochronous functions, and scheduling polling of selected ones of said isochronous functions in the base frame in accordance with said truncated integer multipliers, for data communication transactions, subject to a first constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data being less than the isochronous watermark for the base frame.

7. The apparatus as set forth in claim 6, wherein,

said first circuitry and complementary logic is further used for determining a frame watermark for each of the soft frames, for delimiting a second upper limit within each of the soft frames for scheduling polling;

and

said second circuitry and complementary logic is further used for scheduling polling of said isochronous peripherals for connection management transactions, around said scheduled polling of said isochronous functions for data communication transactions, subject to a second constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data and the scheduled isochronous peripherals'"'"' transactions being less than the frame watermark for each of the soft frames, said second circuitry and complementary logic replicating the one or more base frames to schedule said polling for connection management transactions, if necessary.

8. The apparatus as set forth in claim 6, wherein,

said second circuitry and complementary logic is further used for scheduling polling of said asynchronous peripherals for asynchronous and connection management transactions, around said scheduled polling of said isochronous functions for data communication transactions, subject to a second constraint that cumulative transmit times of said scheduled isochronous functions'"'"' isochronous data and said scheduled asynchronous peripherals'"'"' transaction being less than said frame watermark for each of the soft frames, said second circuitry and complementary logic replicating the base frames to schedule said polling of said asynchronous peripherals for asynchronous and connection management transactions, if necessary.

9. The apparatus as set forth in claim 2, wherein said first circuitry and complementary logic disposed on said system unit polls said isochronous and said asynchronous peripherals for said latency requirements of isochronous functions and transmit times of isochronous data, and said transaction requirements of said asynchronous peripherals and transmit times of transactions respectively, at power on and reset.

10. The apparatus as set forth in claim 9, wherein said first circuitry and complementary logic disposed on said system unit further periodically polls said isochronous and said asynchronous peripherals during operation, for said latency requirements of isochronous functions and transmit times of isochronous data, and said transactional requirements of said asynchronous peripherals and said transmit times of transactions respectively.

11. In a computer system comprising a system unit, a plurality of isochronous peripherals and a plurality of asynchronous peripherals, wherein the peripherals, both isochronous as well as asynchronous, are coupled to the system unit, a method for generating and maintaining frame based polling schedules that guaranty latencies and bandwidths to isochronous functions of the isochronous peripherals, the method comprising the steps of:

a) conducting a plurality of configuration management transactions between the system unit and the peripherals, synchronous as well as asynchronous, to dynamically determine a plurality of operating characteristics for each of the peripherals, including latency requirement of the isochronous functions and transmit time of isochronous data, as well as transactional requirements for the asynchronous peripherals and transmit times for transactions; and

b) generating and maintaining a polling schedule for the system unit to poll the peripherals, the polling schedule being generated and maintained in accordance with the determined operating characteristics, and consisting of a superframe having a plurality of soft frames that are replications of one or more base frames, wherein polling of each of the isochronous functions is scheduled in multiple ones of the soft frames by virtue of said replications and scheduling polling of each of the isochronous functions in at least one of the one or more base frames, and polling of each of the asynchronous peripherals is scheduled in at most one of the soft frames.

12. The method as set forth in claim 11, wherein step (a) is performed at power on and reset.

13. The method as set forth in claim 12, wherein step (a) is further performed periodically during operation.

14. The method as set forth in claim 11, wherein step (b) comprises determining an isochronous watermark for a base frame, for delimiting a first upper limit within the base frame for scheduling polling of isochronous functions.

15. The method as set forth in claim 14, wherein, step (b) further comprises scheduling polling of isochronous functions in the base frame, for data communication transactions, subject to a first constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data being less than the isochronous watermark.

16. The method as set forth in claim 15, wherein, said step (b) further comprises:

determining a frame watermark for each of the soft frames, for delimiting a second upper limit within each of the soft frames for scheduling polling; and

scheduling polling of said isochronous peripherals for connection management transactions, around said scheduled polling of said isochronous functions for data communication transactions, subject to a second constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data and schedule isochronous peripherals'"'"' transactions being less than the frame watermark for each soft frame, replicating said one or more base soft frames to schedule said polling for connection management transactions, if necessary.

17. The method as set forth in claim 15, wherein,

step (b) further comprises determining a frame watermark for each of the soft frames for delimiting a second upper limit within each of the soft frames for scheduling polling, and scheduling polling of said asynchronous peripherals for asynchronous and connection management transactions, around said scheduled polling of said isochronous functions for data communication transactions, subject to a second constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data and the scheduled asynchronous peripherals'"'"' transactions being less than the frame watermark of each soft frame, replicating said one or more base frames to schedule said polling of said asynchronous peripherals for asynchronous and connection management transactions, if necessary.

18. The method as set forth in claim 14, wherein, step (b) further comprises determining a least common update rate required by said isochronous functions based on their respective update rates required which are computed from said latency requirements, determining a plurality of truncated integer multipliers, one for each isochronous function, based on said least common update rate and said update rates required by said isochronous functions, and scheduling polling of said isochronous functions in the base soft frame and in accordance with said truncated integer multipliers, for data communication transactions, subject to a first constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data being less than the isochronous watermark for the base frame.

19. The method as set forth in claim 18, wherein, step (b) further comprises

determining a frame watermark for each of the soft frames, for delimiting a second upper limit within each of the soft frames for scheduling polling;

and

scheduling polling of said isochronous peripherals for connection management transactions, around said scheduled polling of said isochronous functions for data communication transactions, subject to a second constraint that cumulative transmit times of the scheduled isochronous functions'"'"' isochronous data and the scheduled isochronous peripherals'"'"' transactions of each soft frame being less than the frame watermark, replicating said one or more base frames to schedule said polling for connection management transactions, if necessary.

20. The method as set forth in claim 18, wherein,

step (b) further comprises determining a frame watermark for each of the soft frames, for delimiting a second upper limit within each of the soft frames for scheduling polling, and scheduling polling of said asynchronous peripherals for asynchronous and connection management transactions, around said scheduled polling of said isochronous functions for data communication transactions, subject to a second constraint that cumulative transmit time of the scheduled isochronous functions'"'"' isochronous data and the scheduled asynchronous peripherals'"'"' transaction for each soft frame being less than the frame watermark, replicating said one or more base frames to schedule said polling of said asynchronous peripherals for asynchronous and connection management transactions, if necessary.