Surge protective device having a surface collector region directly shorted to a base region

• US 5,744,854 A
• Filed: 08/09/1996
• Issued: 04/28/1998
• Est. Priority Date: 08/10/1995
• Status: Expired due to Term

• Current Assignee: Nippondenso Co., Ltd. (DENSO Corporation)
• Original Assignee: Nippondenso Co., Ltd. (DENSO Corporation)
• Inventors: Okada, Hiroshi, Yamada, Toshitaka
• Primary Examiner(s): Thomas, Tom
• Assistant Examiner(s): Hardy, David B.
• Application Number:
  US08/694,828
• Time in Patent Office: 627 Days
• Field of Search: 257/578, 257/565, 257/163, 257/164, 257/165, 257/587, 257/173
• US Class Current: 257/565
• CPC Class Codes: H01L 27/0259 using bipolar transistors as protective elements

Abstract

A surge protective device, which has a favorable surge-absorbing characteristic while avoiding increase in chip area and in process complexity, is disclosed. In a surge protective device having an ordinary planar bipolar transistor structure and having a voltage-regulation diode to absorb surge current by breakdown of a junction between an emitter region and base region thereof, a surface collector region thereof is shorted to the base region. Accordingly, when surge current is increased, a pn junction between a collector region and the base region is sufficiently forward biased, and thereby a backward transistor is formed. Surge current is sufficiently absorbed by the operation of the backward transistor.

Claims

1. A surge protective device, comprising:

a collector region of a first conductivity type provided on a semiconductor substrate;

a base region of a second conductivity type disposed at a surface portion of said collector region;

an emitter region of a first conductivity type disposed within said base region, said base region and said emitter region collectively forming a voltage-regulation diode in which said emitter region makes up a cathode and said base region makes up an anode; and

a surface collector region of said first conductivity type disposed at said surface portion of said collector region, said surface collector region being directly shorted to said base region by a wire.

2. A surge protective device according to claim 1, wherein said emitter region is disposed in said base region so as to be arranged between a base contact hole through which said base region is connected to an electrode and said surface collector region.

3. A surge protective device according to claim 2, wherein said emitter region has a plane pattern sandwiching said base contact hole, said surface collector region having such a plane pattern that said surface collector region and said base contact hole together interpose said emitter region therebetween.

4. A surge protective device according to claim 2, wherein an impurity concentration of said surface collector region is higher than that of said collector region, and said base region and said surface collector region are continguous.

5. A surge protective device according to claim 3, wherein an impurity concentration of said surface collector region is higher than that of said collector region, and said base region and said surface collector region are contiguous.

6. A surge protective circuit comprising a plurality of said surge protective devices according to any one of claims 1 through 5, said surge protective devices being connected in series and formed integratedly on a semiconductor.

7. An integrated circuit comprising:

a first surge protective circuit comprising a plurality of said surge protective devices according to any one of claims 1 through 5, said surge protective devices of said first surge protective circuit being connected in series and formed integratedly on a semiconductor;

a second surge protective circuit comprising a plurality of said surge protective devices according to any one of claims 1 through 5, said surge protective devices of said second surge protective circuit being connected in series and formed integratedly on said semiconductor;

a signal processing circuit formed on said semiconductor substrate and isolated from said first and said second surge protective circuits; and

a high-level power-supply line, a low-level power-supply line, and a signal line for input or output use, all of which are connected to said signal processing circuit, wherein said first surge protective circuit is connected between said high-level power-supply line and said low-level power-supply line and said second surge protective circuit is connected between said signal line and said low-level power-supply line,

wherein an anode of said surge protective device connected in said first surge protective circuit at a lowest potential side, together with an anode of said surge protective device connected in said second surge protective circuit at a lowest potential side, is disposed adjacently to a pad portion of said low-level power-supply line.

8. An integrated circuit comprising:

a surge protective circuit comprising said surge protective device according to any one of claims 1 through 5, said surge protective circuit being formed on said semiconductor substrate;

a signal processing circuit formed on said semiconductor substrate and isolated from said surge protective circuit;

a first electric line connecting said signal processing circuit with a pad portion; and

a second electric line connecting said surge protective circuit with said pad portion, said second electric line being formed wider in line width than said first electric line.

9. A surge protective circuit comprising said surge protective device according to claim 1, said surge protective device being connected in parallel to a signal processing circuit by said anode of said voltage-regulation diode connected to a low-level power-supply line for said signal processing circuit and said cathode thereof connected to a high-level power-supply line therefor.

10. A surge protective device, comprising:

a collector region of an N conductivity type provided on a semiconductor substrate;

a base region of a P conductivity type disposed at a surface portion of said collector region;

an emitter region of said N conductivity type disposed within said base region, said base region and said emitter region collectively forming a voltage-regulation diode in which said emitter region makes up a cathode and said base region makes up an anode; and

a surface collector region of said N conductivity type disposed at said surface portion of said collector region, wherein said surface collector region and said base region are connected to a low-level power-supply line, and said emitter region is connected to a high-level power-supply line.

11. A surge protective device according to claim 10, wherein impurity concentrations of said collector region, base region and emitter region have the following relationship:

space="preserve" listing-type="equation">N.sub.E >

N.sub.B >

N.sub.C

wherein N_E is an impurity concentration of said emitter region, N_B is an impurity concentration of said base region, and N_C is an impurity concentration of said collector region.