Optimization processing for integrated circuit physical design automation system using optimally switched cost function computations
First Claim
1. A physical design automation system for producing a highest fitness cell placement for an integrated circuit chip, comprising:
- a fitness computer for computing a fitness value for a population of cell placements;
a placement alterator for altering said cell placements using a predetermined fitness improvement algorithm in accordance with said fitness values respectively; and
a controller for controlling the fitness computer to initially compute said fitness values using a predetermined second fitness function after reaching a computation optimization criterion which is predetermined to maximize convergence of said cell placements toward an optimal configuration and to reduce probability of convergence of said cell placements toward a local optima.
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Abstract
In a physical design automation system for producing an optimized cell placement for an integrated circuit chip, a placement optimization methodology is decomposed into a plurality of cell placement optimization processes that are performed simultaneously by parallel processors on input data representing the chip. The results of the optimization processes are recomposed to produce an optimized cell placement. The fitness of the optimized cell placement is analyzed, and the parallel processors are controlled to selectively repeat performing the optimization processes for further optimizing the optimized cell placement if the fitness does not satisfy a predetermined criterion. The system can be applied to initial placement, routing, placement improvement and other problems. The processors can perform the same optimization process on different placements, or on areas of a single placement. Alternatively, the processors can perform different optimization processes simultaneously on a single initial placement, with the resulting processed placement having the highest fitness being selected as the optimized placement. The processors can further selectively reprocess areas of a placement having high cell interconnect congestion or other low fitness parameters.
71 Citations
23 Claims
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1. A physical design automation system for producing a highest fitness cell placement for an integrated circuit chip, comprising:
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a fitness computer for computing a fitness value for a population of cell placements; a placement alterator for altering said cell placements using a predetermined fitness improvement algorithm in accordance with said fitness values respectively; and
a controller for controlling the fitness computer to initially compute said fitness values using a predetermined second fitness function after reaching a computation optimization criterion which is predetermined to maximize convergence of said cell placements toward an optimal configuration and to reduce probability of convergence of said cell placements toward a local optima. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of increasing a fitness of a cell placement for an integrated circuit chip, comprising the steps of:
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(a) computing a fitness value for said cell placement; (b) altering said cell placement using a predetermined fitness improvement algorithm in accordance with said fitness value; and (c) controlling step (a) such that said fitness value is computed based on a predetermined computation optimization criterion which reduces risk of convergence of said cell placement at a local optima and which uses a predetermined first fitness function or a predetermined second fitness function. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification