Apparatus and method for digital data transmission over a CATV system using an ATM transport protocol and SCDMA

• US 5,745,837 A
• Filed: 03/14/1996
• Issued: 04/28/1998
• Est. Priority Date: 08/25/1995
• Status: Expired due to Term

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Terayon Corp. (Morningstar Incorporated)
• Inventors: Fuhrmann, Amir Michael
• Primary Examiner(s): Peng, John K.
• Assistant Examiner(s): Flynn, Nathan J.
• Application Number:
  US08/616,071
• Time in Patent Office: 775 Days
• Field of Search: 348/6, 348/7, 348/13, 348/14, 348/15, 348/16, 348/17, 348/12, 455/3.1, 455/4.1, 455/4.2, 455/6.1, 455/6.2, 455/6.3, 375/395, 375/396, 375/397, 375/398, 375/399, 375/905, 375/369, 375/370, 395/200.01, 395/200.02, 395/200.03, 395/200.04, 395/200.05, 395/200.06, 395/200.1, 395/200.09, 395/200.11, 395/200.12-200.18
• US Class Current: 725/114
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 2201/709709 Methods of preventing interference
• CPC Class Codes: H04B 7/2668 Arrangements for Wireless Code-Division Multiple Access [CDMA] System Synchronisation, for code acquisition H04B1/7075, for code tracking H04B1/7085
• CPC Class Codes: H04H 60/97 using uplink of the CATV systems
• CPC Class Codes: H04J 13/00 Code division multiplex systems for frequency hopping H04B1/713
• CPC Class Codes: H04J 13/004 Orthogonal
• CPC Class Codes: H04J 13/18 Allocation of orthogonal codes
• CPC Class Codes: H04J 14/007 Orthogonal Optical Code Multiplex
• CPC Class Codes: H04J 3/0652 Synchronisation among time division multiple access [TDMA] nodes, e.g. time triggered protocol [TTP] bus network with centralized control in which slots are of a TDMA packet structure H04L12/4035
• CPC Class Codes: H04J 3/0682 by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
• CPC Class Codes: H04J 3/0694 Synchronisation in a TDMA node, e.g. TTP
• CPC Class Codes: H04L 12/2801 Broadband local area networks
• CPC Class Codes: H04L 2025/03414 Multicarrier
• CPC Class Codes: H04L 25/03343 Arrangements at the transmitter end
• CPC Class Codes: H04L 27/362 Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence
• CPC Class Codes: H04L 5/023 Multiplexing of multicarrier modulation signals multicarrier modulation H04L27/2601
• CPC Class Codes: H04L 5/026 using code division
• CPC Class Codes: H04L 5/06 the signals being represented by different frequencies combined with time-division multiplexing H04L5/26
• CPC Class Codes: H04L 7/04 Speed or phase control by synchronisation signals H04L7/0075 takes precedence
• CPC Class Codes: H04L 7/041 using special codes as synchronising signal
• CPC Class Codes: H04N 7/10 : Adaptations for transmission by electrical cable H04N7/12 takes precedence
• CPC Class Codes: H04N 7/17309 : Transmission or handling of upstream communications
• CPC Class Codes: H04W 28/24 : Negotiating SLA [Service Level Agreement]; Negotiating QoS [Quality of Service]
• CPC Class Codes: H04W 28/26 : Resource reservation
• CPC Class Codes: H04W 4/18 : Information format or content conversion, e.g. adaptation by the network of the transmitted or received information for the purpose of wireless delivery to users or terminals
• CPC Class Codes: H04W 48/16 : Discovering, processing access restriction or access information
• CPC Class Codes: H04W 74/0866 : using a dedicated channel for access

Abstract

A method and apparatus for carrying an ATM communication protocol on a hybrid fiber coax CATV system. Point to point communication is supported by use of synchronous code division multiplexing on the physical and by assigning on the MAC layer one or more orthogonal SCDMA codes exclusively for use by pairs of devices needing to communicate such the head end and any customer premises equipment. Quality of service or guaranteed bandwidth availability is implemented by controlling the code space at the MAC layer such that certain CPEs having in use peripherals which cannot tolerate interruptions in data flow may reserve one or more SCDMA codes for use exclusively by them. Standard ATM cells are modified by the addition of a two byte virtual link header which identifies to which CPE a particular ATM packet is destined. This virtual header also makes possible broadcast and multicast of packets from the head end to all CPEs. Each byte in each ATM cell has 8 bits of data and a 9th bit which is encoded with to indicate where the ATM cell starts and includes CRC data for error detection and correction. Bandwidth is allocated by the head end computer which executes algorithms on the MAC layer to collect actual bandwidth usage information and requests for bandwidth and prioritize them in accordance with the channel allocation/reservation scheme currently use. The channel allocation/reservation scheme can be changed on the fly and reallocation calculations to adjust bandwidth allocations are calculated every 10 milliseconds and the new allocations are distributed in downstream messages which are transmitted to all CPEs.

Claims

1. A process for transmitting ATM protocol format cells over a CATV network providing point-to-multipoint coupling between a head end modem and a plurality of customer premises equipment (hereafter CPE) modems for communicating with one or more peripheral devices coupled to each CPE modem, comprising:

receiving data bytes from one or more data sources directed to a plurality of destination software processes in execution on a plurality of computing devices coupled to a plurality of destination CPE modems;

converting said data so received into a plurality of ATM cells, each having payload data and a standard ATM cell header which includes a destination address identifying the destination software process to which the payload data is to be delivered, and each having a virtual link header which includes virtual link address data identifying the particular destination CPE modem to which said ATM cell is to be delivered;

encoding the data in said ATM cells so that said destination CPE modem can locate the beginning and end of each ATM cell directed to it by examining the data of the ATM cell itself;

encoding the data of each ATM cell with one or more synchronous code division multiplexing spreading code(s)(hereafter SCDMA code(s)) which are assigned to only the virtual link assigned to the destination CPE modem of the particular ATM cell being so encoded, each of the SCDMA codes assigned to a particular virtual link being mathematically orthogonal to all the other SCDMA codes, all said SCDMA codes defining an SCDMA code matrix, so as to generate SCDMA encoded data for every ATM cell;

controlling modulation of one or more radio frequency carriers with said SCDMA encoded data to generate one or more RF signals carrying the data of all said ATM cells and transmitting said RF signals to all destination CPE modems;

receiving and demodulating said RF signals in each destination CPE modem to recover said SCDMA encoded data;

decoding said SCDMA encoded data using a decoding matrix which is the transpose of said SCDMA code matrix to recover all said ATM cell data in each destination CPE modem;

decoding said recovered ATM cell data in each destination CPE modem to locate the ATM cell boundaries in each said destination CPE modem;

in each destination CPE modem, comparing the virtual link address data in the virtual link header of each said ATM cell to the virtual link number assigned to that particular destination CPE modem, and, in each destination CPE modem, discarding any ATM cell not addressed to that particular CPE modem;

in each destination CPE modem, examining the destination address data in each ATM cell not discarded which identifies the particular destination software process to which the ATM cell is directed, disassembling the ATM cell and transmitting the payload data of the ATM cell to the destination software process to which the payload data is addressed.

2. A process for transmitting ATM protocol format cells over a CATV network providing point-to-multipoint coupling between a head end modem and a plurality of customer premises equipment (hereafter CPE) modems for communication between one or more peripheral devices coupled to each CPE modem and said head end modem, comprising:

receiving at each of a plurality of CPE modems data bytes from one or more data sources coupled to said CPE modems, each data byte directed to one of a plurality of destination software processes in execution on a plurality of computing devices coupled to said head end modem;

at each said CPE modem, converting said data so received into a plurality of ATM cells, each having payload data and a standard ATM cell header which includes a destination address identifying the destination software process to which the payload data is to be delivered;

at each CPE modem, encoding the data in each of said ATM cells so that said head end modem can locate the beginning and end of each ATM cell by examining the data of the ATM cell itself;

at each CPE modem, encoding the data of each ATM cell generated at said CPE modem with one or more synchronous code division multiplexing spreading code(s)(hereafter SCDMA code(s)) which are assigned to only the virtual link assigned to that CPE modem, each of the SCDMA codes assigned to a particular virtual link being mathematically orthogonal to all the other SCDMA codes used by other CPE modems to encode the data of ATM cells generated at said other CPE modems, all said SCDMA codes used at all said OPE modems defining an SCDMA code matrix, said encoding at each CPE modem generating SCDMA encoded data at each CPE modem for every ATM cell generated at said CPE modem;

at each CPE modem, controlling modulation of one or more radio frequency carriers with said SCDMA encoded data generated at that CPE modem to generate one or more RF signals carrying the data of all said ATM cells generated at said CPE modem, and combining all said RF signals generated at all CPE modems for transmission on said CATV network to said head end modem;

receiving and demodulating said combined RF signals at said head end modem to recover said SCDMA encoded data generated at all said CPE modems;

decoding said SCDMA encoded data at said head end modem using a decoding matrix which is the transpose of said SCDMA code matrix so as to recover all said ATM cell data;

at said head end modem, decoding said recovered ATM cell data to locate the ATM cell boundaries of each ATM cell;

at said head end modem, examining the destination address data in each ATM cell which identifies the particular destination software process coupled to said head end modem to which the ATM cell is directed, and disassembling each ATM cell and transmitting the payload data of the ATM cell to the particular destination software process to which the payload data is addressed.

3. A process for transmitting ATM protocol format cells over a CATV network providing point-to-multipoint coupling between a head end modem and a plurality of customer premises equipment (hereafter CPE) modems for communicating with one or more peripheral devices coupled to each CPE modem, comprising:

receiving a first plurality of data bytes from a first data source coupled to said head end modem in the form of 8-bit bytes which are directed to a particular peripheral device coupled to a first CPE modem or are directed to a particular software process in execution on a computer coupled to said first CPE modem (hereafter referred to as the first destination device or process), said data containing destination address information identifying the address of the first destination device or process;

receiving a second plurality of data bytes from a second data source, which may or may not be the same as said first data source, and which is coupled to said head end modem in the form of 8-bit bytes which are directed to a particular peripheral device coupled to a second CPE modem, which may or may not be the same CPE modem as said first CPE modem, or are directed to a particular software process in execution on a computer coupled to said second CPE modem (hereafter referred to as the second destination device or process), said data containing destination address information identifying the address of the second destination device or process;

composing a first downstream ATM format cell from said first plurality of data bytes received from said first data source, said first downstream ATM cell having a predetermined number of 8-bit payload data bytes and a predetermined number of 8-bit header bytes which includes destination address information composed from said destination address information in said first plurality of data bytes received from said first data source and identifying the address of said first destination device or process;

composing a second downstream ATM format cell from said second plurality of data bytes received from said second data source, said second downstream ATM cell having a predetermined number of 8-bit payload data bytes and a predetermined number of 8-bit header bytes which includes destination address information composed from said destination address information in said second plurality of data bytes received from said second data source and identifying the address of second destination device or process;

appending to said first downstream ATM cell a virtual link header containing one or more 8-bit bytes of virtual link address data identifying one or more logical channels comprising a virtual link between said head end modem and first CPE modem to which the data of said first downstream ATM cell is directed (hereafter referred to as the first destination CPE);

appending to said second downstream ATM cell a virtual link header containing one or more 8-bit bytes of virtual link address data identifying one or more logical channels comprising a virtual link between said head end modem and second CPE modem to which the data of said second downstream ATM cell is directed (hereafter referred to as the second destination CPE);

adding a 9th bit to each 8-bit byte in each of said first and second downstream ATM cells, and encoding a predetermined number of said 9th bits starting with the 9th bit of the first byte of said virtual link header byte or bytes of each of said first and second downstream ATM cells with a predetermined, unique start code to indicate where each of said first and second downstream ATM cells starts such that ATM cell boundaries can be determined at said first and second destination CPE modems;

assigning one or more numbered timeslots defining a first set of timeslots occurring during a first frame of timeslots on a first time division multiple access bus (hereafter first TDMA bus), said first TDMA bus for transmitting a plurality of frames of data within said head end modem, each frame comprised of a plurality of numbered timeslots each of which may contain data and including timeslots having numbers which correspond to said first and second set of timeslots, said first set of timeslots assigned to the one or more virtual links assigned to said first destination CPE modem;

assigning one or more timeslots defining a second set of numbered timeslots of said first frame on said first TDMA bus, said second set of numbered timeslots assigned to the one or more virtual links assigned to said second destination CPE modem and which may or may not be interleaved with the numbered timeslots comprising said first set of timeslots;

placing one or more of said 9-bit bytes defining said first downstream ATM cell in said one or more numbered timeslots of said first set of timeslots during said first frame, and continuing during second and subsequent frames to put sequential 9-bit bytes from said first downstream ATM cell in sets of numbered timeslots which correspond in timeslot numbers to said first set of timeslots until all 9-bit bytes of said first downstream ATM cell have been transmitted on said time division multiple access bus;

placing one or more of said 9-bit bytes defining said second downstream ATM cell in said one or more numbered timeslots of said second set of timeslots during said first frame, and continuing during second and subsequent frames to put sequential 9-bit bytes from said second downstream ATM cell in sets of numbered timeslots which correspond in timeslot numbers to said second set of timeslots until all 9-bit bytes of said second downstream ATM cell have been transmitted on said time division multiple access bus;

receiving the data in said first set of timeslots and encoding said 9-bit bytes in said first set of timeslots with one or more synchronous code division multiplexing spreading codes (hereafter SCDMA codes) defining a first set SCDMA codes which are assigned to the logical channel corresponding to said first destination OPE to generate first SCDMA encoded data;

receiving the data in said second set of timeslots and encoding said 9-bit bytes in said second set of timeslots with one or more synchronous code division multiplexing spreading codes defining a second set SCDMA codes which orthogonal to said first set of SCDMA codes and which are assigned to the logical channel corresponding to said second destination CPE to generate second SCDMA encoded data where said first and second SCDMA encoded data may or may not be interleaved, and wherein said first and second sets of SCDMA codes define at least part of a first code matrix;

using said first and second SCDMA encoded data to modulate one or more radio frequency carriers having center frequencies in a band of frequencies assigned to downstream traffic from the head end to the CPEs and combining the modulated radio frequency carrier signals so as to generate one or more downstream radio frequency signals;

transmitting said one or more downstream radio frequency signals to all said CPE modems over said CATV system;

receiving and demodulating said one or more downstream radio frequency signals at each CPE modem to recover said first and second SCDMA encoded data;

decoding said first and second SCDMA encoded data at said first destination CPE modem using a second code matrix, said second code matrix being the transpose of said first code matrix so as to recover the data which was transmitted on said first TDMA bus during said first and second sets of timeslots and continuing this process during second and subsequent frames until all 9-bit bytes of said first and second ATM cells are recovered;

decoding said first and second SCDMA encoded data at said second destination CPE modem using a second code matrix, said second code matrix being the transpose of said first code matrix so as to recover the data which was transmitted on said first TDMA bus during said first and second sets of timeslots and continuing this process during second and subsequent frames until all 9-bit bytes of said first and second ATM cells are recovered;

transmitting said 9-bit bytes of said first and second ATM cells in individual timeslots on a second TDMA bus located in said first destination CPE modem to a cell timing recovery circuit in said first destination CPE modem;

transmitting said 9-bit bytes of said first and second ATM cells in individual timeslots on a third TDMA bus located in said second destination CPE modem to a cell timing recovery circuit in said second destination CPE modem;

decoding said 9th bits of the 9-bit bytes of said first and second ATM cells in said first destination CPE modem to recover the cell boundaries of said first and second ATM cells;

decoding said 9th bits of the 9-bit bytes of said first and second ATM cells in said second destination CPE modem to recover the cell boundaries of said first and second ATM cells;

comparing in said first destination CPE modem the virtual link address data in said virtual link headers of said first and second ATM cells to the virtual link number assigned to said first destination CPE, and discarding said second ATM cell because of a mismatch of its virtual link address data to the virtual link number assigned to said first destination CPE and stripping off said virtual link header of said first ATM cell;

comparing in said second destination CPE modem the virtual link address data in said virtual link headers of said first and second ATM cells to the virtual link number assigned to said second destination CPE, and discarding said first ATM cell because of a mismatch of its virtual link address data to the virtual link number assigned to said first destination CPE and stripping off said virtual link header of said second ATM cell;

transmitting said first ATM cell minus its virtual link header but still having a standard ATM cell header in Utopia format to a segmentation and reassembly circuit in said first destination CPE;

transmitting said second ATM cell minus its virtual link header but still having a standard ATM cell header in Utopia format to a segmentation and reassembly circuit in said second destination CPE;

in said first destination CPE modem, comparing said destination address data in said standard ATM cell header of said first ATM cell to the destination addresses of the peripheral devices coupled to said first destination CPE modem and any software processes in execution on computers coupled to said first destination CPE modem so as to locate the destination device or process of said first ATM cell;

disassembling said first ATM cell and transmitting the payload data thereof to said destination device or process of said first ATM cell coupled to said first destination CPE modem;

in said second destination CPE modem, comparing said destination address data in said standard ATM cell header of said second ATM cell to the destination addresses of the peripheral devices coupled to said second destination CPE modem and any software processes in execution on computers coupled to said second destination CPE modem so as to locate the destination device or process of said second ATM cell;

disassembling said second ATM cell and transmitting the payload data thereof to said destination device or process of said second ATM cell coupled to said second destination CPE modem.