Feedback loop for reading threshold voltage
First Claim
1. A read circuit, comprising:
- an amplifier;
means for connecting a node of a selected memory cell to an input terminal of the amplifier;
means for applying a current to the input terminal of the amplifier, the means for applying comprising;
a first transistor coupled between a supply voltage and the input terminal;
a second transistor having a gate and a drain coupled together and to the gate of the first transistor; and
a reference cell coupled in series with the second transistor between the supply voltage and ground; and
means for connecting an output terminal of the amplifier to a gate of the selected memory cell, wherein an output voltage of the amplifier, that is provided while the output terminal is connected to the gate and the input terminal is connected to the node, indicates a data value stored in the selected memory cell.
5 Assignments
0 Petitions
Accused Products
Abstract
To read the threshold voltage of a transistor such as a floating gate transistor in an analog or multi-level memory cell, the transistor is connected in a feedback loop which contains a differential amplifier having an output terminal and an input terminal respectively connected to the gate and a node (source or drain) of the transistor. A reference voltage is asserted to a second input terminal of the differential amplifier. A load provides a current which charges the node, and the differential amplifier adjusts the gate voltage of the memory cell to an equilibrium value where current through the transistor is equal to current through the reference cell. The equilibrium value of the gate voltage depends on and indicates the threshold voltage of the transistor. In one embodiment of the invention, the load is a current source which mirrors a current through a reference cell that is structurally identical to the transistor, and the drain of the reference cell provides the reference voltage to the amplifier.
232 Citations
19 Claims
-
1. A read circuit, comprising:
-
an amplifier; means for connecting a node of a selected memory cell to an input terminal of the amplifier; means for applying a current to the input terminal of the amplifier, the means for applying comprising; a first transistor coupled between a supply voltage and the input terminal; a second transistor having a gate and a drain coupled together and to the gate of the first transistor; and a reference cell coupled in series with the second transistor between the supply voltage and ground; and means for connecting an output terminal of the amplifier to a gate of the selected memory cell, wherein an output voltage of the amplifier, that is provided while the output terminal is connected to the gate and the input terminal is connected to the node, indicates a data value stored in the selected memory cell. - View Dependent Claims (2, 3, 4, 5, 6, 18, 19)
-
-
7. A memory, comprising:
-
an amplifier; a load coupled between an input terminal of the amplifier and a constant voltage terminal; an array of memory cells; a column decoder adapted to connect a node of a selected memory cell in the array to the input terminal of the amplifier; and a row decoder adapted to connect an output terminal of the amplifier to a gate of the selected memory cell, wherein an output voltage from the amplifier, provided while the output terminal is connected to the gate of the selected memory cell and the input terminal is connected to the node of the selected memory cell, indicates a data value stored in the selected memory cell. - View Dependent Claims (8, 9, 10, 11, 12)
-
-
13. A method for reading the threshold voltage of a transistor, comprising:
-
connecting a node of the transistor to a first input terminal of a differential amplifier; connecting an output terminal of the differential amplifier to a gate of the transistor; applying a reference voltage to a second input terminal of the differential amplifier; applying a current to the node; and determining the threshold voltage of the transistor from a voltage on gate of the transistor. - View Dependent Claims (14, 15, 16, 17)
-
Specification