Method and apparatus for implementing a two-port ethernet bridge using a semaphoring technique

• US 5,748,634 A
• Filed: 09/14/1995
• Issued: 05/05/1998
• Est. Priority Date: 09/14/1995
• Status: Expired due to Term

• Current Assignee: Level One Communications, Inc. (Intel Corporation)
• Original Assignee: Level One Communications, Inc. (Intel Corporation)
• Inventors: Ketchum, Kevin D., Sokol, Michael A.
• Primary Examiner(s): HSU, ALPUS
• Application Number:
  US08/528,112
• Time in Patent Office: 964 Days
• Field of Search: 370/258, 370/389, 370/400, 370/401, 370/402, 370/403, 370/404, 370/405, 370/406, 370/445, 370/447, 370/462, 340/825.05, 340/825.52, 395/200.13, 395/200.15, 395/200.21
• US Class Current: 370/402
• CPC Class Codes: H04L 12/4625 Single bridge functionality, e.g. connection of two networks over a single bridge

Abstract

A method and apparatus for implementing a two-port Ethernet bridge using a semaphoring technique. The Ethernet bridge includes two MAC devices, a bus, a memory and a semaphoring scheme. The controllers include a first address which is used for indicating receipt of the packet and a second address which is used for indicating the transmission of the packet from the memory and for clearing of the memory location of the packet for further use. The receiving media access controller receives a data packet on a first port and the transmitting media access controller transmits the packet from the memory to a second port associated with the address of the intended user designated by the packet. The memory includes a dual-ring structure, with one ring used for receive traffic and the other ring used for transmit traffic. The MACs also include programmability for designating the type of packets that may be received. Thus, a particular address on the bus is uniquely designated to carry each message and the address on the bus is independent of the source of the message.

Claims

1. A bridging device for routing packets between a receiving port and a destination port, comprising:

a receiving media access controller, the receiving media access controller receiving a data packet on a first port, the packet intended for a user with an address unassociated with users attached to the receiving media access controller;

at least one transmitting media access controller, the at least one transmitting media access controller having a second port, the second port associated with the address of the intended user designated by the packet being received on the first port;

a bus, disposed between the receiving and transmitting media access devices, for interconnecting the receiving and transmitting media access controllers;

a memory, coupled to the bus, for providing a common data structure for storing data packets received by the receiving media access controller prior to transmission by the transmitting media access controller;

a first unique address, programmed into the receiving and transmitting media access controllers, a receiving media access controller signaling to the first unique address in the transmitting media access controller to indicate receipt of a packet for transmission; and

a second unique address, programmed into the receiving and transmitting media access controllers, a transmitting media access controller signaling to the second unique address in the receiving media access controller to indicate transmission of the packet.

2. The bridging device of claim 1 wherein the receiving and the transmitting media access controllers operate independently.

3. The bridging device of claim 1 wherein the memory further comprises a dual-ring structure, with one ring used for receive traffic and the other ring used for transmit traffic.

4. The bridging device of claim 3 wherein the address in one of the media access controllers used for indicating receive traffic must be set to be the same as the address in the other media access controller used for transmit traffic.

5. The bridging device of claim 3 wherein the ring used for receive traffic further comprises a write boundary for setting a limit that the receiver can not overwrite.

6. The bridging device of claim 5 wherein the writing of data into the second unique address informs the receiving media access controller of changes in the write-boundary.

7. The bridging device of claim 1 wherein the first unique address must be designated the same for the receiving and transmitting media access controllers.

8. The bridging device of claim 7 wherein the second unique address must be designated the same for the receiving and the transmitting media access controllers.

9. The bridging device of claim 1 wherein the receiving and the transmitting media access controllers further comprise means for identifying types of packets that may be received and means for controlling whether packets are received.

10. The bridging device of claim 9 further comprising a filtering means coupled to the controlling means for determining acceptable packets and rejecting unacceptable packets.

11. A bridging device for forwarding packets received on a first port to a second port, comprising:

a first media access controller receiving a data packet intended for a user with an address unassociated therewith;

a second media access controller having a user with the intended address;

a bus, disposed between the first and second media access controllers, for interconnecting the first and second media access controllers;

a memory, coupled to the bus, for providing a common data structure for storing data packets received by the first and second media access controller; and

a semaphore communication scheme, shared by the first and second media access controllers, for signaling to the second media access controller that a packet has been received by the first media access controller and is stored in the memory, and for signalling by the second media access controller to the first media access controller after transmission of the stored packet that the packet in the memory has been transmitted.

12. The bridging device of claim 11 wherein the first and second media access controllers operate independently.

13. The bridging device of claim 11 wherein the memory further comprises a dual-ring structure, with one ring used for receive traffic and the other ring used for transmit traffic.

14. The bridging device of claim 13 wherein the address in the first media access controllers used for receive traffic must be set to be the same as the address in the second media access controller used for transmit traffic.

15. The bridging device of claim 13 wherein the ring used for receive traffic further comprises a write boundary for setting a limit that the receiver can not overwrite.

16. The bridging device of claim 15 wherein the writing of data into the second unique address informs the first media access controller of changes in the write-boundary.

17. The bridging device of claim 13 wherein the receive traffic and transmit traffic rings further comprise a stop boundary and a start boundary, the receive process finishes receiving the current packet and wraps to the start boundary for the next packet when the stop boundary is reached.

18. The bridging device of claim 17 wherein the receiving media access controller uses memory past the stop boundary when the length of the received packet necessitates.

19. The bridging device of claim 11 wherein the first and second media access controller further comprises means for identifying types of packets that may be received and means for controlling whether packets are received.

20. The bridging device of claim 19 further comprising a filtering means coupled to the controlling means for determining acceptable packets and rejecting unacceptable packets.

21. The bridging device of claim 11 wherein the communication scheme for signaling to the second media access controller that a packet has been received by the first media access controller and is stored in the memory further comprises a first unique address, writing to the first unique address indicating the receipt of a packet for transmission.

22. The bridging device of claim 21 wherein the communication scheme for signalling by the second media access controller to the first media access controller that the packet in memory has been transmitted further comprises a second unique address, writing to the second unique address indicating the transmission of the packet in the memory location.

23. The bridging device of claim 11 wherein the communication scheme for signalling by the second media access controller to the first media access controller that the packet in memory has been transmitted further comprises a second unique address, writing to the second unique address indicating the transmission of the packet in the memory location.

24. The bridging device of claim 23 wherein the first unique address must be designated the same for both the first and second media access controllers.

25. The bridging device of claim 24 wherein the second unique address must be designated the same for both the first and second media access controllers.

26. A method of transferring a packet received on a port of a first media access controller to a port on a second media access controller, comprising the steps of:

receiving on a port of the first media access controller a packet having a destination address associated with a port of the second media access controller;

storing the packet in a memory attached to a bus, the memory and the bus being shared by the first media access controller and the second media access controller;

signaling by the first media access controller to a first unique address in the second media access controller that a packet has been received and is stored in the memory;

transmitting the packet in memory to the destination address by the second media access controller;

signaling by the second media access controller to a second unique address in the first media access controller that the packet has been transmitted.

27. The method of claim 26 wherein the step of signaling by the second media access controller further comprises the step of indicating to the first media access controller that the memory location occupied by the transmitted packet is free for use by other received packets.

28. The method of claim 26 further comprising the steps of identifying types of packets that may be received, determining whether received packets are acceptable, and rejecting unacceptable packets.