Semiconductor device provided with LDD transistors

• US 5,751,035 A
• Filed: 09/23/1996
• Issued: 05/12/1998
• Est. Priority Date: 09/27/1995
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kameda, Yasushi, Segawa, Makoto
• Primary Examiner(s): MEIER, STEPHEN D
• Application Number:
  US08/718,657
• Time in Patent Office: 596 Days
• Field of Search: 257/296, 257/300
• US Class Current: 257/300
• CPC Class Codes: H10B 10/00 Static random access memory [SRAM] devices
• CPC Class Codes: H10B 10/15 comprising a resistor load element

Abstract

A semiconductor device is provided with at least one transistor formed on a semiconductor substrate, the transistor being provided with a conductive sidewall spacer, and at least one conductive film formed so as to face a gate of the transistor via an insulative film, the conductive film covering at least an entire region of a gate region of the transistor and acting as a capacitor electrode. The conductive sidewall spacer and the conductive film are connected together. A potential is supplied to the conductive sidewall spacer and the conductive film, the potential being different from a potential of the gate of the transistor.

Claims

1. A semiconductor device comprising:

at least one transistor formed on a semiconductor substrate, the transistor having a gate and a conductive sidewall spacer adjacent the gate;

a first conductive film formed on the semiconductor substrate;

an insulative film formed on the first conductive film; and

a second conductive film formed on the insulative film, the second conductive film covering the gate of the transistor and connecting the conductive sidewall spacer and the first conductive film;

wherein the conductive sidewall spacer and the second conductive film define a capacitor electrode when a voltage different from a voltage supplied to the gate of the transistor is supplied to the capacitor electrode.

2. The semiconductor device according to claim 1, wherein the transistor is of a lightly-doped drain structure.

3. The semiconductor device according to claim 1, wherein the sidewall spacer is made of polysilicon.

4. The semiconductor device according to claim 1, wherein the second conductive film also covers at least one of a drain and a source of the transistor.

5. A semiconductor device according to claim 1, wherein the second insulative film is formed on the gate and the second conductive film is formed on the insulative film above the gate of the transistor.

6. A static random access memory cell circuit device comprising:

at least one flip-flop having at least two transistors, each of the transistors formed on a semiconductor substrate and having a gate and a conductive sidewall spacer adjacent the gate;

a first conductive film formed on the semiconductor substrate;

an insulative film formed on the first conductive film; and

a second conductive film formed on the insulative film, the second conductive film covering the gate of each of the transistors and connecting the conductive sidewall spacer and the first conductive film;

wherein the conductive sidewall spacer and the second conductive film define a capacitor electrode when a voltage different from a voltage supplied to the gate of each of the transistors is supplied to the capacitor electrode.

7. A static random access memory cell circuit device according to claim 6, wherein the first conductive film is connected to a drain of each of the transistors.