Semiconductor device having parallel overlapping main current terminals

• US 5,751,058 A
• Filed: 04/22/1996
• Issued: 05/12/1998
• Est. Priority Date: 10/25/1995
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Matsuki, Masatoshi
• Primary Examiner(s): Jackson, Jerome
• Assistant Examiner(s): Kelley, Nathan K.
• Application Number:
  US08/635,767
• Time in Patent Office: 750 Days
• Field of Search: 257/701, 257/678, 257/687, 257/692, 361/804, 361/728, 361/736, 361/772
• US Class Current: 257/692
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/19107 off-chip wires

Abstract

Main current terminals (31, 32) electrically coupled to main electrodes of IGBT elements (27) which are loaded on a power substrate (30) project from a side wall of a case (21) to the exterior. The main current terminals (31, 32), which are in the form of flat plates having the same plane contours in principal parts thereof, are arranged to be parallel to each other and overlap with each other. Thus, inductances of the main current terminals (31, 32) are suppressed. An insulating member (33) is interposed between the portions of the main current terminals (31, 32) outwardly projecting from the case (21), while outwardly extending from the plane contours of the main current terminals (31, 32). Therefore, a withstand voltage across these portions of the main current terminals (31, 32) is maintained at a high value. The interior of the case (21) is filled up with an electric insulating filler (43), whereby a withstand voltage across the remaining portions of the main current terminals (31, 32) which are stored in the case (21) is also maintained at a high value. Thus, a high withstand voltage across the main current terminals and reduction of the inductances are compatibly implemented.

Claims

1. A semiconductor device comprising:

a circuit substrate including wiring patterns along a major substrate surface and supporting a switching element having a pair of main electrodes coupled to the wiring patterns;

a case holding said circuit substrate;

a pair of electrically conductive main current terminals having a pair of first end portions inside the case adjacent to and electrically coupled with respective first and second ones of said pair of main electrodes and further having a pair of closely spaced parallel principal parts extending from respective ones of the first end portions, said closely spaced principal parts including a pair of respective closely spaced parallel second end portions projecting outside of said case, at least the pair of said closely spaced parallel principal parts of said pair of electrically conductive main current terminals having identical overlapping segments with plane contours;

an electrically insulating material filling in spaces at least between and around said closely spaced parallel principal parts inside said case;

an electrically insulating member having at least a supporting and separating flat plate segment located between said pair of closely spaced parallel second end portions maintaining electrical insulation therebetween, said flat plate segment extending from between said pair of closely spaced parallel second end portions all around the periphery thereof to improve the withstand voltage of the closely spaced parallel second end portions.

2. The semiconductor device in accordance with claim 1, wherein

said insulating member comprises electric insulating resin integrally molded with said pair of main current terminals.

3. The semiconductor device in accordance with claim 1, wherein

said case is in the form of a box having upper, bottom and side surfaces,

said circuit substrate is in parallel with said bottom surface of said case,

respective said principal parts of said pair of main current terminals are in the form of flat plates being parallel to said bottom surface of said case, and

said second end portions of said pair of main current terminals project outside the case from said side surface of said case.

4. The semiconductor device in accordance with claim 3, wherein

said case is formed by bonding a case upper part including said upper surface and a case lower part including said bottom surface to each other, and

said pair of main current terminals are held between said case upper part and said case lower part along with said insulating member, whereby said pair of second end portions project outside the case from said side surface of said case.

5. The semiconductor device in accordance with claim 4, further comprising a control substrate supporting a control element for controlling said switching element, and

said control substrate is contained in said case.

6. The semiconductor device in accordance with claim 5, wherein

said control substrate is mounted on said case upper part to be parallel to said circuit substrate.

7. The semiconductor device in accordance with claim 6, wherein

said case upper part has a partition plate on its inner side, and

said control substrate is fixed onto said partition plate.

8. The semiconductor device in accordance with claim 7, wherein

conductive relay pins are implanted in said partition plate, and

first and second end portions of said relay pins are connected to said control substrate and said wiring patterns of said circuit substrate respectively, thereby electrically coupling said control element with said switching element.

9. The semiconductor device in accordance with claim 6, wherein

a signal terminal mounted on said control substrate is electrically coupled with said control element and projects toward the exterior from a side surface of said case upper part.

10. The semiconductor device in accordance with claim 4, further comprising cooling means in contact with a major surface of said circuit substrate opposite the major substrate surface carrying said switching element.

11. The semiconductor device in accordance with claim 10, wherein

said cooling means comprises a box-type cooling fin having a labyrinth shaped passage for holding a refrigerant in its interior.

12. The semiconductor device in accordance with claim 11, wherein

said cooling fin comprises a pair of plugs being attached to inlet and outlet ports of said passage thereby enabling connection with an external device supplying said refrigerant, and

said pair of plugs project toward the outside of the case from a side surface of said case lower part.

13. The semiconductor device in accordance with claim 10, wherein

said cooling means has a heat conductive metal plate,

an opening is formed in said bottom surface of said case lower part, and

a major surface of said metal plate is opposite to said circuit substrate is exposed to the outside through said opening.

14. The semiconductor device in accordance with claim 3, wherein

said pair of main current terminals have a pair of bent coupling parts coupling respective said principal parts and said pair of first end portions with each other respectively,

first and second ones of said pair of coupling parts are respectively flush with first and second ones of said principal parts of said pair of main current terminals so that corresponds plane contours thereof overlap with each other, and

said filler material does not interfere with deformation of said coupling parts at least around said coupling parts.

15. The semiconductor device in accordance with claim 1, wherein

said pair of main current terminals have a pair of bent coupling parts coupling respective said principal parts and said pair of first end portions with each other respectively, and

said filler consists of a material not interfering with deformation of said coupling parts at least around said coupling parts.