Control system for display panels

• US 5,751,261 A
• Filed: 08/13/1993
• Issued: 05/12/1998
• Est. Priority Date: 12/31/1990
• Status: Expired due to Term

• Current Assignee: Kopin Corporation
• Original Assignee: Kopin Corporation
• Inventors: Zavracky, Matthew, Odryna, Vic, Mansell, Barry
• Primary Examiner(s): Kuntz, Curtis
• Assistant Examiner(s): CHIN, VIVIAN C
• Application Number:
  US08/106,416
• Time in Patent Office: 1,733 Days
• Field of Search: 345/207, 345/55, 345/58, 345/87, 345/89, 345/101, 345/63, 345/99, 345/100, 345/102, 345/132, 345/127, 348/777, 348/776
• US Class Current: 345/55
• CPC Class Codes: A61B 3/113 for determining or recording eye movement
• CPC Class Codes: G02B 2027/0132 comprising binocular systems
• CPC Class Codes: G02B 2027/0138 comprising image capture systems, e.g. camera
• CPC Class Codes: G02B 2027/0187 slaved to motion of at least a part of the body of the user, e.g. head, eye
• CPC Class Codes: G02B 2027/0198 System for aligning or maintaining alignment of an image in a predetermined direction
• CPC Class Codes: G02B 27/0093 with means for monitoring data relating to the user, e.g. head-tracking, eye-tracking
• CPC Class Codes: G02B 27/017 Head mounted
• CPC Class Codes: G02B 27/0172 characterised by optical features
• CPC Class Codes: G02B 5/30 Polarising elements light-modulating devices with active elements G02F1/00
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/13613 the semiconductor element being formed on a first substrate and thereafter transferred to the final cell substrate
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136277 formed on a semiconductor substrate, e.g. of silicon
• CPC Class Codes: G03B 21/20 Lamp housings
• CPC Class Codes: G06F 3/147 using display panels
• CPC Class Codes: G09G 2300/023 Display panel composed of stacked panels
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2310/0259 with use of an analog or digital ramp generator in the column driver or in the pixel circuit
• CPC Class Codes: G09G 2310/0281 : Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure
• CPC Class Codes: G09G 2320/0233 : Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/041 : Temperature compensation
• CPC Class Codes: G09G 2320/043 : Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2340/0464 : Positioning
• CPC Class Codes: G09G 2360/02 : Graphics controller able to handle multiple formats, e.g. input or output formats
• CPC Class Codes: G09G 2360/145 : the light originating from the display screen
• CPC Class Codes: G09G 2370/04 : Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
• CPC Class Codes: G09G 2370/042 : for monitor identification
• CPC Class Codes: G09G 3/006 : Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/2007 : Display of intermediate tones
• CPC Class Codes: G09G 3/2014 : by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/30 : using electroluminescent panels
• CPC Class Codes: G09G 3/36 : using liquid crystals
• CPC Class Codes: G09G 3/3607 : for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127
• CPC Class Codes: G09G 3/3614 : Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 : using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 5/008 : Clock recovery
• CPC Class Codes: H01L 21/8221 : Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 2221/68359 : used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 25/0756 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 27/0688 : Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 27/1214 : comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1266 : the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/156 : two-dimensional arrays
• CPC Class Codes: H01L 29/786 : Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/78603 : characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78612 : for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
• CPC Class Codes: H01L 29/78618 : characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78633 : with a light shield
• CPC Class Codes: H01L 29/78645 : with multiple gate
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0062 : for devices with an active region comprising only III-V compounds
• CPC Class Codes: H01S 5/423 : having a vertical cavity
• CPC Class Codes: H04N 3/127 : using liquid crystals
• CPC Class Codes: H04N 5/70 : Circuit details for electroluminescent devices
• CPC Class Codes: H04N 5/74 : Projection arrangements for image reproduction, e.g. using eidophor
• CPC Class Codes: H04N 5/7441 : the modulator being an array of liquid crystal cells
• CPC Class Codes: H04N 5/7491 : of head mounted projectors
• CPC Class Codes: H04N 9/3105 : for displaying all colours simultaneously, e.g. by using two or more electronic spatial light modulators simultaneous projection in colour photography G03B33/10; beam splitting or combining systems per se G02B27/10
• CPC Class Codes: H04N 9/312 : Driving therefor driving of electronic spatial light modulators in displays other than projection devices G09G3/34, G09G3/36; control of liquid crystal elements G02F1/133; control of micromechanical modulators G02B26/08
• CPC Class Codes: H04N 9/3141 : Constructional details thereof details not peculiar to the presence of an electronic spatial light modulator G03B21/14
• CPC Class Codes: H04N 9/3144 : Cooling systems cooling of liquid crystal cells in general G02F1/133382; cooling of projectors not peculiar to the presence of an electronic spatial light modulator G03B21/16
• CPC Class Codes: H04N 9/3179 : Video signal processing therefor
• CPC Class Codes: H04N 9/3182 : Colour adjustment, e.g. white balance, shading or gamut white balance per se H04N9/73; control of amplitude of colour signals H04N9/68; colour control circuits for displays in general G09G5/02, G09G3/2003, G09G3/3607
• CPC Class Codes: H05B 33/12 : Light sources with substantially two-dimensional radiating surfaces

Abstract

A control apparatus for an active matrix liquid crystal display device is fabricated with the active matrix as a single integrated SOI circuit. The control apparatus and the active matrix are lifted from a silicon substrate and transferred to a glass substrate as a single piece. The control apparatus comprises a video interface, a column driver, and dual row drivers. The video interface operates the active matrix as a multiple-frequency scanning display device. The polarities of the display pixels are reversed on every frame by a polarity switch coupled to a video signal amplifier. The control apparatus further comprises sensors for generating a gray-scale feedback signal to adjust the gain of the video amplifier. User control of the display is provided by a user interface.

Claims

1. A control apparatus for displaying a video signal from a video source using an active matrix liquid crystal display, the video source generating a select horizontal synchronization frequency from a plurality of selectable horizontal synchronization frequencies and a select vertical synchronization frequency from a plurality of selectable vertical synchronization frequencies, comprising

a Silicon-on-Insulator (SOI) structure having a silicon device layer bonded to a transparent substrate by an adhesive layer, the active matrix liquid crystal display including an active matrix circuit formed in the SOI structure;

a video interface coupled between the video source and the display, the video interface generating a dot clock signal for driving the display at a fixed resolution in response to the select synchronization frequencies;

an active matrix interface circuit formed within the SOI structure and coupled to the video interface for actuating pixels of the active matrix circuit in response to the dot clock signal; and

a user interface coupled between the video source and the video interface for enabling user control of the display.

2. The control apparatus of claim 1 wherein the video interface comprises a control processor and a dot clock regenerator, the control processor detecting a mode change in the video signal in response to a change in the select synchronization frequencies and signaling the mode change to the dot clock regenerator, the dot clock regenerator tracking changes in the select synchronization frequency in response to the mode signal from the control processor, the dot clock regenerator converting the select synchronization frequencies into the dot clock signal.

3. The control apparatus of claim 2 wherein the dot clock regenerator comprises a digitally programmable phase-locked loop for generating a dot clock that tracks changes in the select horizontal synchronization frequency, the mode change signal providing the digital programming.

4. The control apparatus of claim 3 wherein the digitally programmable phase-locked loop operates with a divider multiplication ratio substantially over 8:

1.

5. The control apparatus of claim 4 wherein the divider multiplication ratio is about 800:

1.

6. The control apparatus of claim 1 wherein the video interface is responsive to a select vertical synchronization frequency between about 56 and 70 Hz and a select horizontal synchronization frequency between about 15 and 35 Khz, and the fixed display resolution is 640H×

480V pixels.

7. The control apparatus of claim 1 wherein the video interface is responsive to a select vertical synchronization frequency between about 56 and 100 Hz and a select horizontal synchronization frequency between about 15 and 66 Khz, and the fixed display resolution is 1024H×

768V pixels.

8. A control apparatus for displaying an image encoded as a cathode ray tube (CRT) video drive signal from a video source using a transmissive active matrix display panel, the CRT video drive signal having a select vertical synchronization frequency from a group of selectable vertical frequencies, the apparatus comprising:

a silicon-on-insulator (SOI) structure including an active matrix circuit and an active matrix interface circuit within the display panel, the SOI structure being bonded to a transmissive substrate with an adhesive layer;

a video interface coupled between the video source and the active matrix interface circuit of the display panel, the video interface receiving the CRT video drive signal and in response generating an active matrix drive signal to actuate the display panel that generates the image.

9. The apparatus of claim 8 wherein the select vertical synchronization frequency is over 56 Hz.

10. The apparatus of claim 8 wherein the CRT video drive signal has a select horizontal synchronization frequency from a group of selectable horizontal frequencies.

11. The apparatus of claim 8 wherein the video source is a computer.

12. The apparatus of claim 8 wherein the video source includes a video port and the video interface includes a connector for coupling to the video port.

13. The apparatus of claim 8 wherein the display panel is a light transmissive light valve display panel.

14. A control apparatus for a projection display system, the display system displaying an image encoded as a cathode ray tube (CRT) video drive signal from a video source using a transmissive active matrix liquid crystal display panel, the CRT video drive signal having a select vertical synchronization frequency from a group of selectable vertical frequencies, the apparatus comprising:

a silicon-on-insulator (SOI) structure including an active matrix circuit an active matrix interface circuit within the display panel, the SOI structure being bonded to a transmissive substrate with an adhesive layer;

a video interface coupled between the video source and the display panel, the video interface receiving the CRT video drive signal and in response generating an active matrix drive signal to actuate the display panel to generate an image; and

a light source that is optically coupled to the display panel to project the image onto a viewing surface.

15. The apparatus of claim 14 wherein the select vertical synchronization frequency is over 56 Hz.

16. The apparatus of claim 14 wherein the CRT video drive signal has a select horizontal synchronization frequency from a group of selectable horizontal frequencies.

17. The apparatus of claim 14 wherein the video source is a computer.

18. The apparatus of claim 14 wherein the video source includes a video port and the video interface includes a connector for coupling to the video port.

19. The apparatus of claim 14 wherein the CRT video drive signal is Red-Green-Blue encoded signal.

20. The apparatus of claim 14 wherein the CRT video drive signal is an analog signal.