Method and apparatus for providing precise fault tracing in a superscalar microprocessor
First Claim
1. A method for providing precise trace faults for testing and debugging a superscalar processor, the method comprising the steps of:
- grouping instructions into a cluster of instructions to be executed simultaneously by the superscalar processor;
decoding each instruction of the cluster;
determining faulting instructions, if any, of the cluster of instructions, the faulting instructions being instructions having a break point for testing and debugging;
if no faulting instructions were found, simultaneously executing each instruction in the cluster;
if at least one faulting instruction was found,determining a break faulting instruction, the break faulting instruction being a first faulting instruction in the cluster of instructions;
simultaneously executing the break faulting instruction and each instruction of the cluster occurring prior to the break faulting instruction.
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Accused Products
Abstract
A superscalar processor with a precise fault mechanism. Instructions are grouped into a cluster of instructions to be executed simultaneously by the superscalar processor. The cluster is formed from consecutively sequenced instructions according to a predetermined set of grouping rules. If at least one previously executed instruction exists, the consecutively sequenced instructions begin with an initial instruction that is the first instruction following a last previously executed instruction. Each instruction of the cluster is decoded and faulting instructions, if any, of the cluster are determined. Faulting instructions are instructions having an associated trace fault. If no faulting instructions were found, each instruction in the cluster is executed simultaneously. If, however, at least one faulting instruction was found, a break faulting instruction is determined. The break faulting instruction is the first faulting instruction in the consecutive sequence of the cluster instructions. The break faulting instruction and each instruction of the cluster in the consecutive instruction sequence prior to the break faulting instruction are then simultaneously executed.
125 Citations
30 Claims
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1. A method for providing precise trace faults for testing and debugging a superscalar processor, the method comprising the steps of:
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grouping instructions into a cluster of instructions to be executed simultaneously by the superscalar processor; decoding each instruction of the cluster;
determining faulting instructions, if any, of the cluster of instructions, the faulting instructions being instructions having a break point for testing and debugging;if no faulting instructions were found, simultaneously executing each instruction in the cluster; if at least one faulting instruction was found, determining a break faulting instruction, the break faulting instruction being a first faulting instruction in the cluster of instructions; simultaneously executing the break faulting instruction and each instruction of the cluster occurring prior to the break faulting instruction. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A precise fault superscalar processor comprising:
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execution means for executing instructions simultaneously; grouping means for grouping instructions into a cluster of instructions to be executed simultaneously; decoding means coupled to the grouping means, the decoding means for decoding each instruction of the cluster; fault detection means coupled to the decoding means and the execution means, the fault detection means for detecting faulting instructions, if any, of the cluster, the faulting instructions being instructions having a break point for testing and debugging; scoreboard means coupled to the fault detection means and the execution means, the scoreboard means for determining a break faulting instruction, the break faulting instruction being a first faulting instruction in the consecutive sequence of the cluster instructions, if no faulting instructions were found, the execution means simultaneously executing each instruction in the cluster, if at least one faulting instruction was found, the execution means simultaneously executing the break faulting instruction and each instruction of the cluster in the consecutive instruction sequence prior to the break faulting instruction. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A precise fault superscalar processor comprising:
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an executor for executing instructions simultaneously; a grouper for grouping instructions into a cluster of instructions to be executed simultaneously; a fault detector for detecting faulting instructions, if any, of the cluster, the faulting instructions being instructions having a break point for testing and debugging; and a scoreboard mechanism coupled to the fault detector and the executor, the scoreboard mechanism for determining a break faulting instruction if at least one faulting instruction was found, the break faulting instruction being a first faulting instruction in the consecutive sequence of the cluster instructions, if no faulting instructions were found, the executor simultaneously executing each instruction in the cluster, if at least one faulting instruction was found, the executor simultaneously executing the break faulting instruction and each instruction of the cluster in the consecutive instruction sequence prior to the break faulting instruction. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A method for invoking precise trace faults in a superscalar processor, the method comprising the steps of:
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accessing the superscalar processor with a source external to the superscalar processor, the source for testing and debugging the superscalar processor, and setting at least one trace fault; grouping instructions into a cluster of instructions to be executed simultaneously by the superscalar processor; decoding each instruction of the cluster; determining faulting instructions, if any, of the cluster, the faulting instructions being instructions having a break point for testing and debugging; if no faulting instructions were found, simultaneously executing each instruction in the cluster; if at least one faulting instruction was found, i) determining a break faulting instruction, the break faulting instruction being a first faulting instruction of the cluster of instructions; ii) simultaneously executing the break faulting instruction and each instruction of the cluster prior to the break faulting instruction and then notifying the external source that the break faulting instruction has executed. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30)
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Specification