Integrated circuit and transmitter/receiver

• US 5,752,169 A
• Filed: 03/11/1996
• Issued: 05/12/1998
• Est. Priority Date: 03/14/1995
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Yokoyama, Hiroshi, Hareyama, Nobuo
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): Nguyen, Lee
• Application Number:
  US08/613,510
• Time in Patent Office: 792 Days
• Field of Search: 455/75, 455/76, 455/77, 455/83, 455/84, 455/85, 455/86, 455/112, 455/260, 455/265, 455/333, 455/552, 455/553, 375/274, 375/219, 375/328
• US Class Current: 455/76
• CPC Class Codes: H03D 7/163 the local oscillations of at least two of the frequency changers being derived from a single oscillator
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H04M 1/72502 with one base station connected to a single line

Abstract

An integrated circuit comprises a variable frequency divider for setting a signal transmitting frequency in accordance with a frequency dividing ratio based on externally-provided data. A data converter converts the externally-provided data to a signal for transmission, and a switch selectively provides the externally-provided data to the variable frequency divider and the data converter. As a result, the number of terminals may be reduced, the IC package may be made more compact, the mounting surface area may be reduced, the equipment may be made smaller, and the interference of the data signal provided to the circuit for setting the frequency dividing ratio or the circuit for transmitting data is reduced.

Claims

1. An integrated circuit comprising

frequency dividing ratio setting means for setting a transmission frequency dividing ratio and a receiving frequency dividing ratio based on externally provided data;

first variable frequency dividing means for producing a signal transmitting frequency in accordance with said transmission frequency dividing ratio set by said frequency dividing ratio setting means;

second variable frequency dividing means for producing a signal receiving frequency in accordance with said receiving frequency dividing ratio set by said frequency dividing ratio setting means;

data converting means for converting said externally-provided data to a signal for transmission; and

switching means for selectively providing said externally-provided data to one of said frequency dividing ratio setting means and said data converting means in response to an externally-provided control signal.

2. An integrated circuit according to claim 1, wherein said first and second variable frequency dividing means include a phase-locked loop.

3. A transmitter/receiver including an integrated circuit, said integrated circuit comprising:

frequency dividing ratio setting means for setting a transmission frequency dividing ratio and a receiving frequency dividing ratio based on externally-provided data;

first variable frequency dividing means for producing a signal transmitting frequency in accordance with said transmission frequency dividing ratio set by said frequency dividing ratio setting means;

second variable frequency dividing means for producing a signal receiving frequency in accordance with said receiving frequency dividing ratio set by said frequency dividing setting means;

data converting means for converting said externally-provided data to a signal for transmission; and

switching means for selectively providing said externally-provided data to one of said frequency dividing ratio setting means and said data converting means in response to an externally-provided control signal.

4. A transmitter/receiver according to claim 3, wherein said first and second variable frequency dividing means include a phase-locked loop.