Power factor correction controlled boost converter with an improved zero current detection circuit for operation under high input voltage conditions

• US 5,757,166 A
• Filed: 11/30/1995
• Issued: 05/26/1998
• Est. Priority Date: 11/30/1995
• Status: Expired due to Term

• Current Assignee: OSRAM Sylvania Inc. (Ams-Osram AG)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Sodhi, Sameer
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): Patel, Rajnikant B.
• Application Number:
  US08/565,268
• Time in Patent Office: 908 Days
• Field of Search: 323/222, 323/223, 323/285, 323/207, 363/16, 363/21, 363/78, 363/89, 363/124
• US Class Current: 323/222
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

An electronic power supply circuit (12) having a rectifier circuit (18) adapted to receive a source of alternating current (10), a power factor correction driven boost converter (20), and a bulk capacitance (22). The boost converter (20) includes a boost transformer (24) having a primary winding (32) and a secondary winding (34), a boost switch (26), a boost diode (28), a zener diode (46), and a power factor correction control circuit (30) having a zero current detect input (58). The presence of the zener diode (46) effectively adds a fixed offset to the voltage provided to the zero current detect input (58), thereby allowing the boost converter (20) to operate under high input line voltage conditions. The zener diode (46) may be oriented in various ways, and may be incorporated into an integrated circuit containing other elements of the power factor correction control circuit (30). One particular embodiment of the power supply circuit (12) is for use in an electronic ballast (70) for fluorescent lamps.

Claims

1. An electronic power supply circuit, comprising:

a rectifying circuit having a pair of input terminals for receiving a source of alternating current and having a pair of output terminals;

a boost converter having a pair of input terminals and having a pair of output terminals, the input terminals of the boost converter being coupled to the output terminals of the rectifying circuit, the boost converter comprising;

a boost transformer having a primary winding and a secondary winding, the primary winding being coupled between a first node and a second node, the first node being coupled to a first input terminal of the boost converter;

a boost switch coupled between the second node and a third node, the third node being coupled to a second input terminal of the boost converter and a second output terminal of the boost converter, the boost switch having an on state in which a current flows from the second node to the third node, and an off state in which no current flows from the second node to the third node;

a boost rectifier coupled between the second node and a fourth node, the fourth node being coupled to a first output terminal of the boost converter;

a power factor correction control circuit for driving the boost switch, the power factor correction control circuit having a zero current detect input and being operable to drive the boost switch into the on state in response to a voltage at the zero current detect input falling below a predetermined zero current detect threshold;

a zero current detection circuit for providing to the zero current detect input of the power factor correction control circuit a voltage that is representative of the current flowing in the primary winding of the boost transformer when the boost switch is in the off state, the zero current detection circuit comprising the secondary winding of the boost transformer and a zener diode, the zener diode having an anode and a cathode, the zener diode being coupled between the third node and a fifth node, the secondary winding of the boost transformer being coupled between the fifth node and a sixth node, the sixth node being coupled to the zero current detect input of the power factor correction control circuit, the primary and secondary windings of the boost transformer being oriented in relation to each other such that a non-negative voltage is present from the fifth node to the sixth node while the boost switch is in the on state; and

a bulk capacitance that is coupled across the output terminals of the boost converter, the bulk capacitance comprising at least one capacitor.

2. The circuit of claim 1, wherein the anode of the zener diode is coupled to the third node and the cathode of the zener diode is coupled to the fifth node.

3. The circuit of claim 2, wherein the zener diode has a zener voltage of about 3 volts.

4. The circuit of claim 1, wherein the anode of the zener diode is coupled to the fifth node and the cathode of the zener diode is coupled to the third node.

5. The circuit of claim 1, wherein the rectifying circuit comprises a full-wave diode bridge.

6. The circuit of claim 1, wherein the output terminals of the boost converter are adapted to receive a load connected across them.

7. The circuit of claim 1, wherein at least a portion of the power factor correction control circuit includes an integrated circuit, the integrated circuit including the zener diode.

8. The circuit of claim 1, wherein at least a portion of the power factor correction control circuit includes an integrated circuit, the zener diode being external to the integrated circuit.

9. An electronic ballast for powering gas discharge lamps, comprising:

a rectifying circuit having a pair of input terminals for receiving a source of alternating current and having a pair of output terminals;

a boost converter having a pair of input terminals and having a pair of output terminals, the input terminals of the boost converter being coupled to the output terminals of the rectifying circuit, the boost converter comprising;

a boost transformer having a primary winding and a secondary winding, the primary winding being coupled between a first node and a second node, the first node being coupled to a first input terminal of the boost converter;

a boost switch coupled between the second node and a third node, the third node being coupled to a second input terminal of the boost converter and a second output terminal of the boost converter, the boost switch having an on state in which a current flows from the second node to the third node, and an off state in which no current flows from the second node to the third node;

a boost rectifier coupled between the second node and a fourth node, the fourth node being coupled to a first output terminal of the boost converter;

a power factor correction control circuit for driving the boost switch, the power factor correction control circuit having a zero current detect input and being operable to drive the boost switch into the on state in response to a voltage at the zero current detect input falling below a predetermined zero current detect threshold;

a zero current detection circuit for providing to the zero current detect input of the power factor correction control circuit a voltage that is representative of the current flowing in the primary winding of the boost transformer when the boost switch is in the off state, the zero current detection circuit comprising the secondary winding of the boost transformer and a zener diode, the zener diode having an anode and a cathode, the zener diode being coupled between the third node and a fifth node, the secondary winding of the boost transformer being coupled between the fifth node and a sixth node, the sixth node being coupled to the zero current detect input of the power factor correction control circuit, the primary and secondary windings of the boost transformer being oriented such that a non-negative voltage is present from the fifth node to the sixth node while the boost switch is in the on state;

a bulk capacitance that is coupled across the output terminals of the boost converter, the bulk capacitance comprising at least one capacitor; and

an inverter that is coupled across the output terminals of the boost converter, the inverter being adapted to light at least one fluorescent lamp.

10. The electronic ballast of claim 9, wherein the anode of the zener diode is coupled to the third node and the cathode of the zener diode is coupled to the fifth node.

11. The electronic ballast of claim 10, wherein the zener diode has a zener voltage of about 3 volts.

12. The electronic ballast of claim 9, wherein the anode of the zener diode is coupled to the fifth node and the cathode of the zener diode is coupled to the third node.

13. The electronic ballast of claim 9, wherein the rectifying circuit comprises a full-wave diode bridge.

14. The electronic ballast of claim 9, wherein at least a portion of the power factor correction control circuit includes an integrated circuit, the integrated circuit including the zener diode.

15. The electronic ballast of claim 9, wherein at least a portion of the power factor correction control circuit includes an integrated circuit, the zener diode being external to the integrated circuit.

16. An electronic ballast for powering gas discharge lamps, comprising:

a rectifying circuit having a pair of input terminals for receiving a source of alternating current and having a pair of output terminals, wherein the rectifying circuit comprises a full-wave diode bridge;

a boost converter having a pair of input terminals and having a pair of output terminals, the input terminals of the boost converter being coupled to the output terminals of the rectifying circuit, the boost converter comprising;

a boost transformer having a primary winding and a secondary winding, the primary winding being coupled between a first node and a second node, the first node being coupled to a first input terminal of the boost converter;

a boost switch coupled between the second node and a third node, the third node being coupled to a second input terminal of the boost converter and a second output terminal of the boost converter, the boost switch having an on state in which a current flows from the second node to the third node, and an off state in which no current flows from the second node to the third node;

a boost rectifier coupled between the second node and a fourth node, the fourth node being coupled to a first output terminal of the boost converter;

a power factor correction control circuit for driving the boost switch, the power factor correction control circuit having a zero current detect input and being operable to drive the boost switch into the on state in response to a voltage at the zero current detect input falling below a predetermined zero current detect threshold;

a zero current detection circuit for providing to the zero current detect input of the power factor correction control circuit a voltage that is representative of the current flowing in the primary winding of the boost transformer when the boost switch is in the off state, the zero current detection circuit comprising the secondary winding of the boost transformer and a zener diode, the zener diode having an anode and a cathode, the cathode of the zener diode being coupled to the secondary winding of the boost transformer at a fifth node, the anode of the zener diode being coupled to the third node, the secondary winding of the boost transformer being coupled to a sixth node, the sixth node being coupled to the zero current detect input of the power factor correction control circuit, the primary and secondary windings of the boost transformer being oriented in relation to each other such that a non-negative voltage is present from the fifth node to the sixth node while the boost switch is in the on state;

a bulk capacitance that is coupled across the output terminals of the boost converter, the bulk capacitance comprising at least one capacitor; and

an inverter that is coupled across the output terminals of the boost converter, the inverter being adapted to light at least one fluorescent lamp.

17. The electronic ballast of claim 16, wherein the zener diode has a zener voltage of about 3 volts.

18. The electronic ballast of claim 16, wherein at least a portion of the power factor correction control circuit includes an integrated circuit, the integrated circuit including the zener diode.

19. The electronic ballast of claim 16, wherein at least a portion of the power factor correction control circuit includes an integrated circuit, the zener diode being external to the integrated circuit.