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Bias circuit for a power amplifier

  • US 5,757,229 A
  • Filed: 06/28/1996
  • Issued: 05/26/1998
  • Est. Priority Date: 06/28/1996
  • Status: Expired due to Term
First Claim
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1. A power amplifier comprising:

  • a power divider coupled to an RF input signal for producing an in-phase signal and a quadrature phase signal from the RF input signal;

    a carrier amplifier for amplifying the in-phase signal from the power divider, wherein the carrier amplifier has a carrier amplifier bias input;

    a peaking amplifier for amplifying the quadrature phase signal from the power divider, wherein the peaking amplifier has a peaking amplifier bias input;

    a combiner coupled to an output of the carrier amplifier and an output of the peaking amplifier, the combiner for combining in additive phase the output of the carrier amplifier and the output of the peaking amplifier;

    a first bias circuit coupled to the carrier amplifier, wherein the carrier amplifier bias input is provided by the first bias circuit and controlled by a first signal indicative of the magnitude of the RF input signal of the power amplifier; and

    a second bias circuit coupled to the peaking amplifier, wherein the peaking amplifier bias input is provided by the second bias circuit and controlled by a second signal indicative of the magnitude of the RF input signal of the power amplifier,a level of the carrier amplifier bias input decreased as a level of the peaking amplifier bias input is increased.

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