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High-impedance circuit having reduced stray capacitance

  • US 5,757,232 A
  • Filed: 06/26/1996
  • Issued: 05/26/1998
  • Est. Priority Date: 04/19/1993
  • Status: Expired due to Fees
First Claim
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1. A high-impedance circuit comprising:

  • a differential pair circuit including a first transistor and a second transistor; and

    a buffer circuit for converting an output of said differential pair circuit into a current so as to feedback a current to the differential pair circuit as an input current therefor;

    whereinan output of the buffer circuit supplies respective base currents of said first transistor and said second transistor;

    emitters of said first transistor and said second transistor are commonly connected to the ground via a first constant current source, and said differential pair circuit further comprises current determining means connected to said first transistor and said second transistor for determining currents which flow in said first transistor and said second transistor, respectively; and

    said current determining means includes a first emitter resistance element inserted between the emitter of said first transistor and said first constant current source, and a second emitter resistance element inserted between the emitter of said second transistor and said first constant current source.

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