Electro-optical device and method of driving the same

• US 5,757,444 A
• Filed: 07/01/1997
• Issued: 05/26/1998
• Est. Priority Date: 04/28/1992
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Takemura, Yasuhiko
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): Duong, Tai V.
• Application Number:
  US08/886,569
• Time in Patent Office: 329 Days
• Field of Search: 359/55, 359/59, 359/79, 359/87, 349/38, 349/39, 349/42, 349/48, 349/109, 349/143, 349/144, 349/145, 257/59, 257/72, 345/92
• US Class Current: 349/38
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G09G 2320/0209 Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
• CPC Class Codes: G09G 2320/0219 Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes

Abstract

An active matrix display device for suppressing voltage variation ΔV due to off-operation of a gate pulse, including TFTs and picture-element electrodes, at least one of the TFTs being assigned to each picture element, and each of the TFTs having a gate electrode connected to a gate line (first gate line), and a source and a drain one of which is connected to a data line, wherein a picture-element electrode concerned is formed so as to be overlapped with the first gate line through an insulator, and also so as to be overlapped through an insulator with a gate line other than the first gate line or a wiring disposed in parallel to the first gate line.

Claims

1. An active-matrix device comprising:

a substrate having an insulating surface;

at least first and second pixel electrodes arranged in a first column over said substrate;

at least a third pixel electrode arranged in a second column over said substrate, each of said first, second and third pixel electrodes being provided with at least one thin film transistor;

at least first, second and third gate lines extending in parallel over said substrate,

wherein said first gate line drives the thin film transistor associated with said first pixel electrode;

said second gate line drives the thin film transistor associated with the third pixel electrode and extends below said first pixel electrode to form a storage capacitor between said second gate line and said first pixel electrode;

said third gate line drives the thin film transistor associated with the second pixel electrode and extends below said third pixel electrode to form a storage capacitor between said third gate line and said third pixel electrode.

2. An active matrix device according to claim 1 wherein each of said first, second and third pixel electrodes is light transparent.

3. An active matrix device according to claim 1 wherein each of said first, second and third gate lines extend in a uniform direction.

4. An active-matrix device comprising:

a substrate having an insulating surface;

at least first and second pixel electrodes arranged in a first column over said substrate;

at least a third pixel electrode arranged in a second column over said substrate, each of said first, second and third pixel electrodes being provided with at least one thin film transistor;

at least first, second and third gate lines extending in parallel over said substrate,

wherein said first gate line drives the thin film transistor associated with said first pixel electrode;

said second gate line drives the thin film transistor associated with the third pixel electrode and extends below said first pixel electrode to form a storage capacitor between said second gate line and said first pixel electrode;

said third gate line drives the third film transistor associated with the second pixel electrode and extends below said third pixel electrode to form a storage capacitor between said third gate line and said third pixel electrode, and

the storage capacitance between the third gate line and the third pixel electrode is substantially equal with a capacitance between said second gate line and said third pixel electrode.

5. An active matrix device according to claim 4 wherein each of said first, second and third pixel electrodes is light transparent.

6. An active matrix device according to claim 4 wherein each of said first, second and third gate lines extend in a uniform direction.