Spread spectrum communication synchronizing method and its circuit

• US 5,757,870 A
• Filed: 08/21/1995
• Issued: 05/26/1998
• Est. Priority Date: 08/22/1994
• Status: Expired due to Term

• Current Assignee: INVT SPE LLC (SoftBank Group Corp.)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Go, Roland, Kanaya, Hiroyuki, Miya, Kazuyuki
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): GLUCK, JEFFREY WILLIAM
• Application Number:
  US08/517,408
• Time in Patent Office: 1,009 Days
• Field of Search: 375/200, 375/206, 375/207, 375/367, 370/515, 370/181
• US Class Current: 375/367
• CPC Class Codes: H04B 1/70752 Partial correlation
• CPC Class Codes: H04B 1/70754 Setting of search window, i.e. range of code offsets to be searched H04B1/70758 takes precedence
• CPC Class Codes: H04B 1/70757 with increased resolution, i.e. higher than half a chip H04B1/70758 takes precedence

Abstract

A synchronizing method and circuit accurately and stably operates a direct spread spectrum multiple access communication system. A signal transmitted by modulating the spreading code with data at the transmission side is sampled by a signal of n times (n: 1 or larger integer) the clock speed of the spread spectrum signal at the reception side, and the correlation is detected by a digital matched filter. Consequently, the detection output in every sample in the symbol period is compared with the envelope detection output determined in every sampling period, and the sample positions for a specific number of determined samples are stored in the descending order of the output. The number of times of storage of large sample positions in the stored detection output is counted in every symbol period, and the position of the largest number of storage times is detected as the peak position. From this peak position, capturing or holding the symbol period and setting of the reception window position results.

Claims

1. A spread spectrum communication synchronizing method for sampling a spread spectrum signal comprising the steps of:

modulating a spreading code with data by using a sampling clock having a rate which is an integer multiple of a spreading code chip speed for detecting correlation of the spread spectrum signal,

comparing a magnitude of each detection output in a symbol period from an envelope detection output determined in each sample period,

storing the sample position of a large output signal,

counting numbers of times sample positions are stored in each symbol period, and

synchronizing the data symbol with the largest stored sample position used as a peak position of the envelope detection output,

wherein the peak position is based on the largest number of times the sample position is stored in each sample period.

2. A spread spectrum communication synchronizing method of claim 1, wherein a correlation of the spread spectrum signal is detected by a digital matched filter.

3. A spread spectrum communication synchronizing method for use in direct sequence spread spectrum multiple access communication systems, comprising the steps of:

(a) sampling a received transmission spread spectrum signal comprising a spreading code modulated with data using a sampling clock,

(b) correlating values of the sampled signal by using a digital matched filter,

(c) performing envelope detection of the correlated values for all sample values in a symbol period,

(d) storing the sample positions for a specified number of samples in descending order of magnitude of the envelope detection output,

(e) counting sample numbers of the largest stored sample positions in every symbol period,

(f) detecting as the peak position the sample position corresponding to the largest number of storage times, and

(g) using the detected peak position to at least one of capture and hold the symbol period and to set a reception window positioned.

4. A spread spectrum communication synchronizing method of claim 3, wherein the number of sample positions stored in step (d) and the number of largest stored sample positions of step (e) is variable based on a time change rate of the peak position.

5. A spread spectrum communication synchronizing method of claim 3, wherein at least one of the number of sample positions stored in step (d) and the number of largest stored sample positions of step (e) is variable based on an error rate of decoded data.

6. A spread spectrum communication synchronizing method of claim 3, wherein in step (e) when any sample position count exceeds a predetermined maximum value all the sample position count are reduced by a further predetermined value.

7. A spread spectrum communication synchronizing method of claim 3, wherein a period for counting the sample numbers of step (e) based on a time change rate of the peak position is variable.

8. A spread spectrum communication synchronizing method of claim 3, wherein in step (e) the counted sample numbers are based on weighting one of a size and a rank of the detection output.

9. A spread spectrum communication synchronizing method of claim 3, wherein at least one of a sampling speed for detecting the correlation of step (b), and an operational speed of step (d) is variable based on a time change rate of the peak position.

10. A spread spectrum communication synchronizing method of claim 3 wherein at least one of a sampling speed for detecting the correlation of step (b) and an operational speed of step (d) is variable based on an error rate of decoded data.

11. A spread spectrum communication synchronizing method of claim 3, wherein the value of each stored sample position in a predetermined period is reduced by a predetermined value.

12. A spread spectrum communication synchronizing method of claim 3, wherein the peak position is detected by comparing the peak position detected in an immediately previous symbol period and the sample position in a current symbol period.

13. A spread spectrum communication synchronizing method of claim 3, wherein the sampling clock has a rate which is an integer multiple of a rate of a chip clock generator.

14. A spread spectrum communication synchronizing apparatus for use in direct sequence spread spectrum multiple access communication systems, comprising:

a sampler for sampling a received signal comprising a spreading code modulated by data using a sampling clock,

a digital matched filter coupled to the sampler for detecting a correlation of the spread spectrum signal,

an envelope detector, having an output, for detecting an envelope of the correlated spread spectrum signal in a sampling period,

a sample counter for counting the sampling clocks,

a comparator for comparing a magnitude of the detector output in each sample in a symbol period,

a sample position memory for storing sample positions for a predetermined number of samples in descending order of magnitude based on is the detector output,

a ranking accumulation memory for counting and storing the number of times of storage of the largest sample positions from the detector output in each symbol period,

a peak position detector for detecting the sample position corresponding to the largest number of storage times, the sample position being a peak position, and

a window position setter for i) holding the symbol period, and ii) setting a reception window position based on the peak position.

15. A spread spectrum communication synchronizing apparatus of claim 14, further comprising

means for varying the number of sample positions stored in the sample position memory based on at least one of a time change rate of the peak position and the number of sample positions counted in each symbol period in the ranking accumulation memory.

16. A spread spectrum communication synchronizing apparatus of claim 14, further comprising:

means for varying the number of sample positions stored in the sample position memory based on at least one of an error rate of decoded data and the number of sample positions counted in each symbol period in the ranking accumulation memory.

17. A spread spectrum communication synchronizing apparatus of claim 14, further comprising:

means for reducing the count values of the sample positions stored when a count value exceeds a predetermined maximum value in the ranking accumulation memory.

18. A spread spectrum communication synchronizing apparatus of claim 14, further comprising;

means for varying the period for counting the sample positions stored in the sample position memory by the ranking accumulation memory, based on a time change rate of the peak position.

19. A spread spectrum communication synchronizing apparatus of claim 14, further comprising:

means for counting the sample positions stored in the sample position memory by the ranking accumulation memory based on one of a magnitude and a rank of the detector output.

20. A spread spectrum communication synchronizing apparatus of claim 14, further comprising:

means for varying at least one of i) an operating speed of the sampler, and ii) an operating speed of the matched digital filter, envelope detector, sample counter, comparator and the sample position memory based on a time change rate of the peak position.

21. A spread spectrum communication synchronizing apparatus of claim 14, further comprising:

means for varying at least one of i) an operating speed of the sampler and, ii) an operating speed of the matched digital filter, envelope detector, sample counter, comparator and the sample position memory based on an error rate of decoded data.

22. A spread spectrum communication synchronizing apparatus of claim 14, further comprising:

means for reducing the counts stored in the ranking accumulator memory in each period.

23. A spread spectrum communication synchronizing apparatus of claim 14, further comprising:

a memory for memorizing a peak position detected in an immediately preceding symbol period,

a selector for selecting sample positions for comparison, and

a second comparator coupled to the selector for comparing the sample positions selected by the selector.

24. A spread spectrum communication synchronizing apparatus of claim 14, further comprising.

a clock generator having a predetermined clock rate,

wherein the sampling clock has a rate which is an integer multiple of the clock rate of the clock generator.